/usr/lib/gcc/arm-none-eabi/4.8/plugin/include/config/arm/arm-cores.def is in gcc-arm-none-eabi 4.8.4-1+11-1.
This file is owned by root:root, with mode 0o644.
The actual contents of the file can be viewed below.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 | /* ARM CPU Cores
Copyright (C) 2003-2013 Free Software Foundation, Inc.
Written by CodeSourcery, LLC
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Before using #include to read this file, define a macro:
ARM_CORE(CORE_NAME, CORE_IDENT, ARCH, FLAGS, COSTS)
The CORE_NAME is the name of the core, represented as a string constant.
The CORE_IDENT is the name of the core, represented as an identifier.
ARCH is the architecture revision implemented by the chip.
FLAGS are the bitwise-or of the traits that apply to that core.
This need not include flags implied by the architecture.
COSTS is the name of the rtx_costs routine to use.
If you update this table, you must update the "tune" attribute in
arm.md.
Some tools assume no whitespace up to the first "," in each entry. */
/* V2/V2A Architecture Processors */
ARM_CORE("arm2", arm2, 2, FL_CO_PROC | FL_MODE26, slowmul)
ARM_CORE("arm250", arm250, 2, FL_CO_PROC | FL_MODE26, slowmul)
ARM_CORE("arm3", arm3, 2, FL_CO_PROC | FL_MODE26, slowmul)
/* V3 Architecture Processors */
ARM_CORE("arm6", arm6, 3, FL_CO_PROC | FL_MODE26, slowmul)
ARM_CORE("arm60", arm60, 3, FL_CO_PROC | FL_MODE26, slowmul)
ARM_CORE("arm600", arm600, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
ARM_CORE("arm610", arm610, 3, FL_MODE26 | FL_WBUF, slowmul)
ARM_CORE("arm620", arm620, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
ARM_CORE("arm7", arm7, 3, FL_CO_PROC | FL_MODE26, slowmul)
ARM_CORE("arm7d", arm7d, 3, FL_CO_PROC | FL_MODE26, slowmul)
ARM_CORE("arm7di", arm7di, 3, FL_CO_PROC | FL_MODE26, slowmul)
ARM_CORE("arm70", arm70, 3, FL_CO_PROC | FL_MODE26, slowmul)
ARM_CORE("arm700", arm700, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
ARM_CORE("arm700i", arm700i, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
ARM_CORE("arm710", arm710, 3, FL_MODE26 | FL_WBUF, slowmul)
ARM_CORE("arm720", arm720, 3, FL_MODE26 | FL_WBUF, slowmul)
ARM_CORE("arm710c", arm710c, 3, FL_MODE26 | FL_WBUF, slowmul)
ARM_CORE("arm7100", arm7100, 3, FL_MODE26 | FL_WBUF, slowmul)
ARM_CORE("arm7500", arm7500, 3, FL_MODE26 | FL_WBUF, slowmul)
/* Doesn't have an external co-proc, but does have embedded fpa. */
ARM_CORE("arm7500fe", arm7500fe, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
/* V3M Architecture Processors */
/* arm7m doesn't exist on its own, but only with D, ("and", and I), but
those don't alter the code, so arm7m is sometimes used. */
ARM_CORE("arm7m", arm7m, 3M, FL_CO_PROC | FL_MODE26, fastmul)
ARM_CORE("arm7dm", arm7dm, 3M, FL_CO_PROC | FL_MODE26, fastmul)
ARM_CORE("arm7dmi", arm7dmi, 3M, FL_CO_PROC | FL_MODE26, fastmul)
/* V4 Architecture Processors */
ARM_CORE("arm8", arm8, 4, FL_MODE26 | FL_LDSCHED, fastmul)
ARM_CORE("arm810", arm810, 4, FL_MODE26 | FL_LDSCHED, fastmul)
ARM_CORE("strongarm", strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
ARM_CORE("strongarm110", strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
ARM_CORE("strongarm1100", strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
ARM_CORE("strongarm1110", strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
ARM_CORE("fa526", fa526, 4, FL_LDSCHED, fastmul)
ARM_CORE("fa626", fa626, 4, FL_LDSCHED, fastmul)
/* V4T Architecture Processors */
ARM_CORE("arm7tdmi", arm7tdmi, 4T, FL_CO_PROC , fastmul)
ARM_CORE("arm7tdmi-s", arm7tdmis, 4T, FL_CO_PROC , fastmul)
ARM_CORE("arm710t", arm710t, 4T, FL_WBUF, fastmul)
ARM_CORE("arm720t", arm720t, 4T, FL_WBUF, fastmul)
ARM_CORE("arm740t", arm740t, 4T, FL_WBUF, fastmul)
ARM_CORE("arm9", arm9, 4T, FL_LDSCHED, fastmul)
ARM_CORE("arm9tdmi", arm9tdmi, 4T, FL_LDSCHED, fastmul)
ARM_CORE("arm920", arm920, 4T, FL_LDSCHED, fastmul)
ARM_CORE("arm920t", arm920t, 4T, FL_LDSCHED, fastmul)
ARM_CORE("arm922t", arm922t, 4T, FL_LDSCHED, fastmul)
ARM_CORE("arm940t", arm940t, 4T, FL_LDSCHED, fastmul)
ARM_CORE("ep9312", ep9312, 4T, FL_LDSCHED, fastmul)
/* V5T Architecture Processors */
ARM_CORE("arm10tdmi", arm10tdmi, 5T, FL_LDSCHED, fastmul)
ARM_CORE("arm1020t", arm1020t, 5T, FL_LDSCHED, fastmul)
/* V5TE Architecture Processors */
ARM_CORE("arm9e", arm9e, 5TE, FL_LDSCHED, 9e)
ARM_CORE("arm946e-s", arm946es, 5TE, FL_LDSCHED, 9e)
ARM_CORE("arm966e-s", arm966es, 5TE, FL_LDSCHED, 9e)
ARM_CORE("arm968e-s", arm968es, 5TE, FL_LDSCHED, 9e)
ARM_CORE("arm10e", arm10e, 5TE, FL_LDSCHED, fastmul)
ARM_CORE("arm1020e", arm1020e, 5TE, FL_LDSCHED, fastmul)
ARM_CORE("arm1022e", arm1022e, 5TE, FL_LDSCHED, fastmul)
ARM_CORE("xscale", xscale, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE, xscale)
ARM_CORE("iwmmxt", iwmmxt, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale)
ARM_CORE("iwmmxt2", iwmmxt2, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2, xscale)
ARM_CORE("fa606te", fa606te, 5TE, FL_LDSCHED, 9e)
ARM_CORE("fa626te", fa626te, 5TE, FL_LDSCHED, 9e)
ARM_CORE("fmp626", fmp626, 5TE, FL_LDSCHED, 9e)
ARM_CORE("fa726te", fa726te, 5TE, FL_LDSCHED, fa726te)
/* V5TEJ Architecture Processors */
ARM_CORE("arm926ej-s", arm926ejs, 5TEJ, FL_LDSCHED, 9e)
ARM_CORE("arm1026ej-s", arm1026ejs, 5TEJ, FL_LDSCHED, 9e)
/* V6 Architecture Processors */
ARM_CORE("arm1136j-s", arm1136js, 6J, FL_LDSCHED, 9e)
ARM_CORE("arm1136jf-s", arm1136jfs, 6J, FL_LDSCHED | FL_VFPV2, 9e)
ARM_CORE("arm1176jz-s", arm1176jzs, 6ZK, FL_LDSCHED, 9e)
ARM_CORE("arm1176jzf-s", arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e)
ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, FL_LDSCHED, 9e)
ARM_CORE("mpcore", mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e)
ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, v6t2)
ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, v6t2)
ARM_CORE("generic-armv7-a", genericv7a, 7A, FL_LDSCHED, cortex)
ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, cortex_a5)
ARM_CORE("cortex-a7", cortexa7, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex)
ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, cortex)
ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED, cortex_a9)
ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, cortex)
ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, cortex)
ARM_CORE("cortex-r5", cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
ARM_CORE("cortex-r7", cortexr7, 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, v7m)
ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, v7m)
ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, v6m)
ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, v6m)
ARM_CORE("cortex-m0plus", cortexm0plus, 6M, FL_LDSCHED, v6m)
ARM_CORE("marvell-pj4", marvell_pj4, 7A, FL_LDSCHED, 9e)
|