/usr/include/xen/foreign/arm32.h is in libxen-dev 4.4.1-9+deb8u10.
This file is owned by root:root, with mode 0o644.
The actual contents of the file can be viewed below.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 | /*
* public xen defines and struct for arm32
* generated by mkheader.py -- DO NOT EDIT
*/
#ifndef __FOREIGN_ARM32_H__
#define __FOREIGN_ARM32_H__ 1
#define __arm___ARM32 1
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
# define __DECL_REG(n64, n32) union { __align8__ uint64_t n64; uint32_t n32; }
# define __align8__ __attribute__((aligned (8)))
#else
# define __DECL_REG(n64, n32) __align8__ uint64_t n64
# define __align8__ FIXME
#endif
#define XEN_LEGACY_MAX_VCPUS_ARM32 1
#define _VGCF_online_ARM32 0
#define VGCF_online_ARM32 (1<<_VGCF_online_ARM32)
#define MAX_GUEST_CMDLINE_ARM32 1024
#define arm32_has_no_vcpu_cr_regs 1
#define arm32_has_no_vcpu_ar_regs 1
#define arm32_has_no_start_info 1
#define arm32_has_no_trap_info 1
#define arm32_has_no_cpu_user_regs 1
struct vcpu_guest_core_regs_arm32 {
__DECL_REG(x0, r0_usr);
__DECL_REG(x1, r1_usr);
__DECL_REG(x2, r2_usr);
__DECL_REG(x3, r3_usr);
__DECL_REG(x4, r4_usr);
__DECL_REG(x5, r5_usr);
__DECL_REG(x6, r6_usr);
__DECL_REG(x7, r7_usr);
__DECL_REG(x8, r8_usr);
__DECL_REG(x9, r9_usr);
__DECL_REG(x10, r10_usr);
__DECL_REG(x11, r11_usr);
__DECL_REG(x12, r12_usr);
__DECL_REG(x13, sp_usr);
__DECL_REG(x14, lr_usr);
__DECL_REG(x15, __unused_sp_hyp);
__DECL_REG(x16, lr_irq);
__DECL_REG(x17, sp_irq);
__DECL_REG(x18, lr_svc);
__DECL_REG(x19, sp_svc);
__DECL_REG(x20, lr_abt);
__DECL_REG(x21, sp_abt);
__DECL_REG(x22, lr_und);
__DECL_REG(x23, sp_und);
__DECL_REG(x24, r8_fiq);
__DECL_REG(x25, r9_fiq);
__DECL_REG(x26, r10_fiq);
__DECL_REG(x27, r11_fiq);
__DECL_REG(x28, r12_fiq);
__DECL_REG(x29, sp_fiq);
__DECL_REG(x30, lr_fiq);
__DECL_REG(pc64, pc32);
uint32_t cpsr;
union {
uint32_t spsr_el1;
uint32_t spsr_svc;
};
uint32_t spsr_fiq, spsr_irq, spsr_und, spsr_abt;
__align8__ uint64_t sp_el0;
__align8__ uint64_t sp_el1, elr_el1;
};
typedef struct vcpu_guest_core_regs_arm32 vcpu_guest_core_regs_arm32_t;
struct vcpu_guest_context_arm32 {
uint32_t flags;
struct vcpu_guest_core_regs_arm32 user_regs;
uint32_t sctlr;
__align8__ uint64_t ttbcr, ttbr0, ttbr1;
};
typedef struct vcpu_guest_context_arm32 vcpu_guest_context_arm32_t;
struct arch_vcpu_info_arm32 {
};
typedef struct arch_vcpu_info_arm32 arch_vcpu_info_arm32_t;
struct vcpu_time_info_arm32 {
uint32_t version;
uint32_t pad0;
__align8__ uint64_t tsc_timestamp;
__align8__ uint64_t system_time;
uint32_t tsc_to_system_mul;
int8_t tsc_shift;
int8_t pad1[3];
};
typedef struct vcpu_time_info_arm32 vcpu_time_info_arm32_t;
struct vcpu_info_arm32 {
uint8_t evtchn_upcall_pending;
#ifdef XEN_HAVE_PV_UPCALL_MASK
uint8_t evtchn_upcall_mask;
#else
uint8_t pad0;
#endif
__align8__ __align8__ uint64_t evtchn_pending_sel;
struct arch_vcpu_info_arm32 arch;
struct vcpu_time_info_arm32 time;
};
typedef struct vcpu_info_arm32 vcpu_info_arm32_t;
struct arch_shared_info_arm32 {
};
typedef struct arch_shared_info_arm32 arch_shared_info_arm32_t;
struct shared_info_arm32 {
struct vcpu_info_arm32 vcpu_info[XEN_LEGACY_MAX_VCPUS_ARM32];
__align8__ __align8__ uint64_t evtchn_pending[sizeof(__align8__ __align8__ uint64_t) * 8];
__align8__ __align8__ uint64_t evtchn_mask[sizeof(__align8__ __align8__ uint64_t) * 8];
uint32_t wc_version;
uint32_t wc_sec;
uint32_t wc_nsec;
struct arch_shared_info_arm32 arch;
};
typedef struct shared_info_arm32 shared_info_arm32_t;
#undef __DECL_REG
#endif /* __FOREIGN_ARM32_H__ */
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