/usr/include/gpsim/clock_phase.h is in gpsim-dev 0.29.0-2+b2.
This file is owned by root:root, with mode 0o644.
The actual contents of the file can be viewed below.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 | /*
Copyright (C) 2006 T. Scott Dattalo
This file is part of the libgpsim library of gpsim
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, see
<http://www.gnu.org/licenses/lgpl-2.1.html>.
*/
#if !defined(__CLOCK_PHASE_H__)
#define __CLOCK_PHASE_H__
/*
Clock Phase
The Clock Phase base class takes an external clock source as its
input and uses this to control a module's simulation state. For
example, the clock input on a microcontroller drives all of the
digital state machines. On every edge of the clock, there is digital
logic that can potentially change states. The Clock Phase base class
can be thought of the "logic" that responds to the clock input and
redirects control to the state machines inside of a processor.
*/
class Processor;
class ClockPhase
{
public:
ClockPhase();
virtual ~ClockPhase();
virtual ClockPhase *advance()=0;
void setNextPhase(ClockPhase *pNextPhase) { m_pNextPhase = pNextPhase; }
ClockPhase *getNextPhase() { return m_pNextPhase; }
protected:
ClockPhase *m_pNextPhase;
};
/*
The Processor Phase base class is a Clock Phase class that contains a
pointer to a Processor object. It's the base class from which all of
the processor's various Phase objects are derived.
*/
class ProcessorPhase : public ClockPhase
{
public:
ProcessorPhase(Processor *pcpu);
virtual ~ProcessorPhase();
protected:
Processor *m_pcpu;
};
/*
The Execute 1 Cycle class is a Processor Phase class designed to
execute a single instruction.
*/
class phaseExecute1Cycle : public ProcessorPhase
{
public:
phaseExecute1Cycle(Processor *pcpu);
virtual ~phaseExecute1Cycle();
virtual ClockPhase *advance();
};
class phaseExecute2ndHalf : public ProcessorPhase
{
public:
phaseExecute2ndHalf(Processor *pcpu);
virtual ~phaseExecute2ndHalf();
virtual ClockPhase *advance();
ClockPhase *firstHalf(unsigned int uiPC);
protected:
unsigned int m_uiPC;
};
// phaseIdle - when a processor is idle, the current
// clock source can be handled by this class.
class phaseIdle : public ProcessorPhase
{
public:
phaseIdle(Processor *pcpu);
virtual ~phaseIdle();
virtual ClockPhase *advance();
protected:
};
////// TEMPORARY ////////
// These will be moved into the Processor class.
extern ClockPhase *mCurrentPhase;
extern phaseExecute1Cycle *mExecute1Cycle;
extern phaseExecute2ndHalf *mExecute2ndHalf;
extern phaseIdle *mIdle;
#endif //if !defined(__CLOCK_PHASE_H__)
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