/usr/share/gEDA/sym/74/7495-2.sym is in geda-symbols 1:1.6.2-4.3.
This file is owned by root:root, with mode 0o644.
The actual contents of the file can be viewed below.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 | v 20070626 1
P 0 2600 300 2600 1 0 0
{
T 200 2650 5 8 1 1 0 6 1
pinnumber=2
T 200 2550 5 8 0 1 0 8 1
pinseq=1
T 350 2600 9 8 1 1 0 0 1
pinlabel=P0
T 350 2600 5 8 0 1 0 2 1
pintype=in
}
P 2000 2600 1700 2600 1 0 0
{
T 1800 2650 5 8 1 1 0 0 1
pinnumber=13
T 1800 2550 5 8 0 1 0 2 1
pinseq=2
T 1650 2600 9 8 1 1 0 6 1
pinlabel=Q0
T 1650 2600 5 8 0 1 0 8 1
pintype=out
}
P 0 2200 300 2200 1 0 0
{
T 200 2250 5 8 1 1 0 6 1
pinnumber=3
T 200 2150 5 8 0 1 0 8 1
pinseq=3
T 350 2200 9 8 1 1 0 0 1
pinlabel=P1
T 350 2200 5 8 0 1 0 2 1
pintype=in
}
P 2000 2200 1700 2200 1 0 0
{
T 1800 2250 5 8 1 1 0 0 1
pinnumber=12
T 1800 2150 5 8 0 1 0 2 1
pinseq=4
T 1650 2200 9 8 1 1 0 6 1
pinlabel=Q1
T 1650 2200 5 8 0 1 0 8 1
pintype=out
}
P 0 1800 300 1800 1 0 0
{
T 200 1850 5 8 1 1 0 6 1
pinnumber=4
T 200 1750 5 8 0 1 0 8 1
pinseq=5
T 350 1800 9 8 1 1 0 0 1
pinlabel=P2
T 350 1800 5 8 0 1 0 2 1
pintype=in
}
P 2000 1800 1700 1800 1 0 0
{
T 1800 1850 5 8 1 1 0 0 1
pinnumber=11
T 1800 1750 5 8 0 1 0 2 1
pinseq=6
T 1650 1800 9 8 1 1 0 6 1
pinlabel=Q2
T 1650 1800 5 8 0 1 0 8 1
pintype=out
}
P 0 1400 300 1400 1 0 0
{
T 200 1450 5 8 1 1 0 6 1
pinnumber=5
T 200 1350 5 8 0 1 0 8 1
pinseq=7
T 350 1400 9 8 1 1 0 0 1
pinlabel=P3
T 350 1400 5 8 0 1 0 2 1
pintype=in
}
P 2000 1400 1700 1400 1 0 0
{
T 1800 1450 5 8 1 1 0 0 1
pinnumber=10
T 1800 1350 5 8 0 1 0 2 1
pinseq=8
T 1650 1400 9 8 1 1 0 6 1
pinlabel=Q3
T 1650 1400 5 8 0 1 0 8 1
pintype=out
}
P 0 1000 300 1000 1 0 0
{
T 200 1050 5 8 1 1 0 6 1
pinnumber=6
T 200 950 5 8 0 1 0 8 1
pinseq=9
T 350 1000 9 8 1 1 0 0 1
pinlabel=LD/\_SH\_
T 350 1000 5 8 0 1 0 2 1
pintype=in
}
P 0 600 200 600 1 0 0
{
T 200 650 5 8 1 1 0 6 1
pinnumber=9
T 200 550 5 8 0 1 0 8 1
pinseq=10
T 375 600 9 8 1 1 0 0 1
pinlabel=\_CLK1\_
T 375 600 5 8 0 1 0 2 1
pintype=clk
}
P 0 200 200 200 1 0 0
{
T 200 250 5 8 1 1 0 6 1
pinnumber=8
T 200 150 5 8 0 1 0 8 1
pinseq=11
T 375 200 9 8 1 1 0 0 1
pinlabel=\_CLK2\_
T 375 200 5 8 0 1 0 2 1
pintype=clk
}
B 300 0 1400 3300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 300 3740 5 10 0 0 0 0 1
device=7495
T 300 3540 5 10 0 0 0 0 1
footprint=DIP14
T 1700 3400 8 10 1 1 0 6 1
refdes=U?
T 300 3950 5 10 0 0 0 0 1
description=4-bit shift register, parallel load, right and left shift
T 300 4150 5 10 0 0 0 0 1
net=Vcc:14
T 300 4350 5 10 0 0 0 0 1
net=GND:7
V 250 600 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 250 200 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 375 200 300 250 3 0 0 0 -1 -1
L 375 200 300 150 3 0 0 0 -1 -1
L 375 600 300 550 3 0 0 0 -1 -1
L 375 600 300 650 3 0 0 0 -1 -1
T 300 3340 9 10 1 0 0 0 1
7495
P 0 3000 300 3000 1 0 0
{
T 200 3050 5 8 1 1 0 6 1
pinnumber=1
T 200 2950 5 8 0 1 0 8 1
pinseq=12
T 350 3000 9 8 1 1 0 0 1
pinlabel=SER
T 350 3000 5 8 0 1 0 2 1
pintype=in
}
T 300 4550 5 10 0 0 0 0 1
numslots=0
|