/usr/share/gEDA/sym/micro/ATmega103.sym is in geda-symbols 1:1.6.2-4.3.
This file is owned by root:root, with mode 0o644.
The actual contents of the file can be viewed below.
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T 3600 12300 8 10 1 1 0 6 1
refdes=U?
T 400 12450 5 10 0 0 0 0 1
device=Atmega103
T 400 12650 5 10 0 0 0 0 1
footprint=TQFP64
T 400 12850 5 10 0 0 0 0 1
net=Vcc:21,52
T 400 13050 5 10 0 0 0 0 1
net=GND:22,53
T 400 13250 5 10 0 0 0 0 1
net=AGND:63
T 400 13450 5 10 0 0 0 0 1
net=AVcc:64
P 2900 100 2900 400 1 0 0
{
T 2950 200 5 8 1 1 0 0 1
pinnumber=23
T 2950 200 5 8 0 1 0 2 1
pinseq=1
T 2900 450 9 8 1 1 0 3 1
pinlabel=XTAL2
T 2900 600 5 8 0 1 0 3 1
pintype=out
}
P 2300 100 2300 400 1 0 0
{
T 2350 200 5 8 1 1 0 0 1
pinnumber=24
T 2350 200 5 8 0 1 0 2 1
pinseq=2
T 2300 450 9 8 1 1 0 3 1
pinlabel=XTAL1
T 2300 600 5 8 0 1 0 3 1
pintype=in
}
P 1700 100 1700 400 1 0 0
{
T 1750 200 5 8 1 1 0 0 1
pinnumber=18
T 1750 200 5 8 0 1 0 2 1
pinseq=3
T 1700 450 9 8 1 1 0 3 1
pinlabel=TOSC2
T 1700 600 5 8 0 1 0 3 1
pintype=out
}
P 1100 100 1100 400 1 0 0
{
T 1150 200 5 8 1 1 0 0 1
pinnumber=19
T 1150 200 5 8 0 1 0 2 1
pinseq=4
T 1100 450 9 8 1 1 0 3 1
pinlabel=TOSC1
T 1100 600 5 8 0 1 0 3 1
pintype=in
}
P 100 800 300 800 1 0 0
{
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pinnumber=20
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pinseq=5
T 450 800 9 8 1 1 0 0 1
pinlabel=\_Reset\_
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pintype=in
}
V 350 800 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 100 1200 300 1200 1 0 0
{
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pinnumber=1
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pinseq=6
T 450 1200 9 8 1 1 0 0 1
pinlabel=\_PEN\_
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pintype=in
}
V 350 1200 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 100 2200 400 2200 1 0 0
{
T 300 2250 5 8 1 1 0 6 1
pinnumber=9
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pinseq=7
T 450 2200 9 8 1 1 0 0 1
pinlabel=PE7 (INT7)
T 450 2200 5 8 0 1 0 2 1
pintype=io
}
P 100 2600 400 2600 1 0 0
{
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pinnumber=8
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pinseq=8
T 450 2600 9 8 1 1 0 0 1
pinlabel=PE6 (INT6)
T 450 2600 5 8 0 1 0 2 1
pintype=io
}
P 100 3000 400 3000 1 0 0
{
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pinnumber=7
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pinseq=9
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pinlabel=PE5 (INT5)
T 450 3000 5 8 0 1 0 2 1
pintype=io
}
P 100 3400 400 3400 1 0 0
{
T 300 3450 5 8 1 1 0 6 1
pinnumber=6
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pinseq=10
T 450 3400 9 8 1 1 0 0 1
pinlabel=PE4 (INT4)
T 450 3400 5 8 0 1 0 2 1
pintype=io
}
P 100 3800 400 3800 1 0 0
{
T 300 3850 5 8 1 1 0 6 1
pinnumber=5
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pinseq=11
T 450 3800 9 8 1 1 0 0 1
pinlabel=PE3 (AC-)
T 450 3800 5 8 0 1 0 2 1
pintype=io
}
P 100 4200 400 4200 1 0 0
{
T 300 4250 5 8 1 1 0 6 1
pinnumber=4
T 300 4150 5 8 0 1 0 8 1
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T 450 4200 9 8 1 1 0 0 1
pinlabel=PE2 (AC+)
T 450 4200 5 8 0 1 0 2 1
pintype=io
}
P 100 4600 400 4600 1 0 0
{
T 300 4650 5 8 1 1 0 6 1
pinnumber=3
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pinseq=13
T 450 4600 9 8 1 1 0 0 1
pinlabel=PE1 (PDO/TXD)
T 450 4600 5 8 0 1 0 2 1
pintype=io
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P 100 5000 400 5000 1 0 0
{
T 300 5050 5 8 1 1 0 6 1
pinnumber=2
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T 450 5000 9 8 1 1 0 0 1
pinlabel=PE0 (PDI/RXD)
T 450 5000 5 8 0 1 0 2 1
pintype=io
}
P 100 5600 400 5600 1 0 0
{
T 300 5650 5 8 1 1 0 6 1
pinnumber=32
T 300 5550 5 8 0 1 0 8 1
pinseq=15
T 450 5600 9 8 1 1 0 0 1
pinlabel=PD7 (T2)
T 450 5600 5 8 0 1 0 2 1
pintype=io
}
P 100 6000 400 6000 1 0 0
{
T 300 6050 5 8 1 1 0 6 1
pinnumber=31
T 300 5950 5 8 0 1 0 8 1
pinseq=16
T 450 6000 9 8 1 1 0 0 1
pinlabel=PD6 (T1)
T 450 6000 5 8 0 1 0 2 1
pintype=io
}
P 100 6400 400 6400 1 0 0
{
T 300 6450 5 8 1 1 0 6 1
pinnumber=30
T 300 6350 5 8 0 1 0 8 1
pinseq=17
T 450 6400 9 8 1 1 0 0 1
pinlabel=PD5
T 450 6400 5 8 0 1 0 2 1
pintype=io
}
P 100 6800 400 6800 1 0 0
{
T 300 6850 5 8 1 1 0 6 1
pinnumber=29
T 300 6750 5 8 0 1 0 8 1
pinseq=18
T 450 6800 9 8 1 1 0 0 1
pinlabel=PD4 (IC1)
T 450 6800 5 8 0 1 0 2 1
pintype=io
}
P 100 7200 400 7200 1 0 0
{
T 300 7250 5 8 1 1 0 6 1
pinnumber=28
T 300 7150 5 8 0 1 0 8 1
pinseq=19
T 450 7200 9 8 1 1 0 0 1
pinlabel=PD3 (\_INT3\_)
T 450 7200 5 8 0 1 0 2 1
pintype=io
}
P 100 7600 400 7600 1 0 0
{
T 300 7650 5 8 1 1 0 6 1
pinnumber=27
T 300 7550 5 8 0 1 0 8 1
pinseq=20
T 450 7600 9 8 1 1 0 0 1
pinlabel=PD2 (\_INT2\_)
T 450 7600 5 8 0 1 0 2 1
pintype=io
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P 100 8000 400 8000 1 0 0
{
T 300 8050 5 8 1 1 0 6 1
pinnumber=26
T 300 7950 5 8 0 1 0 8 1
pinseq=21
T 450 8000 9 8 1 1 0 0 1
pinlabel=PD1 (\_INT1\_)
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pintype=io
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P 100 8400 400 8400 1 0 0
{
T 300 8450 5 8 1 1 0 6 1
pinnumber=25
T 300 8350 5 8 0 1 0 8 1
pinseq=22
T 450 8400 9 8 1 1 0 0 1
pinlabel=PD0 (\_INT0\_)
T 450 8400 5 8 0 1 0 2 1
pintype=io
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P 100 9000 400 9000 1 0 0
{
T 300 9050 5 8 1 1 0 6 1
pinnumber=17
T 300 8950 5 8 0 1 0 8 1
pinseq=23
T 450 9000 9 8 1 1 0 0 1
pinlabel=PB7 (OC2/PWM2)
T 450 9000 5 8 0 1 0 2 1
pintype=io
}
P 100 9400 400 9400 1 0 0
{
T 300 9450 5 8 1 1 0 6 1
pinnumber=16
T 300 9350 5 8 0 1 0 8 1
pinseq=24
T 450 9400 9 8 1 1 0 0 1
pinlabel=PB6 (OC1B/PWM1B)
T 450 9400 5 8 0 1 0 2 1
pintype=io
}
P 100 9800 400 9800 1 0 0
{
T 300 9850 5 8 1 1 0 6 1
pinnumber=15
T 300 9750 5 8 0 1 0 8 1
pinseq=25
T 450 9800 9 8 1 1 0 0 1
pinlabel=PB5 (OC1A/PWM1A)
T 450 9800 5 8 0 1 0 2 1
pintype=io
}
P 100 10200 400 10200 1 0 0
{
T 300 10250 5 8 1 1 0 6 1
pinnumber=14
T 300 10150 5 8 0 1 0 8 1
pinseq=26
T 450 10200 9 8 1 1 0 0 1
pinlabel=PB4 (OC0/PWM0)
T 450 10200 5 8 0 1 0 2 1
pintype=io
}
P 100 10600 400 10600 1 0 0
{
T 300 10650 5 8 1 1 0 6 1
pinnumber=13
T 300 10550 5 8 0 1 0 8 1
pinseq=27
T 450 10600 9 8 1 1 0 0 1
pinlabel=PB3 (MISO)
T 450 10600 5 8 0 1 0 2 1
pintype=io
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P 100 11000 400 11000 1 0 0
{
T 300 11050 5 8 1 1 0 6 1
pinnumber=12
T 300 10950 5 8 0 1 0 8 1
pinseq=28
T 450 11000 9 8 1 1 0 0 1
pinlabel=PB2 (MOSI)
T 450 11000 5 8 0 1 0 2 1
pintype=io
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P 100 11400 400 11400 1 0 0
{
T 300 11450 5 8 1 1 0 6 1
pinnumber=11
T 300 11350 5 8 0 1 0 8 1
pinseq=29
T 450 11400 9 8 1 1 0 0 1
pinlabel=PB1 (SCK)
T 450 11400 5 8 0 1 0 2 1
pintype=io
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P 100 11800 400 11800 1 0 0
{
T 300 11850 5 8 1 1 0 6 1
pinnumber=10
T 300 11750 5 8 0 1 0 8 1
pinseq=30
T 450 11800 9 8 1 1 0 0 1
pinlabel=PB0 (\_SS\_)
T 450 11800 5 8 0 1 0 2 1
pintype=io
}
P 100 1600 400 1600 1 0 0
{
T 300 1650 5 8 1 1 0 6 1
pinnumber=62
T 300 1550 5 8 0 1 0 8 1
pinseq=31
T 450 1600 9 8 1 1 0 0 1
pinlabel=AREF
T 450 1600 5 8 0 1 0 2 1
pintype=in
}
P 3900 800 3700 800 1 0 0
{
T 3700 850 5 8 1 1 0 0 1
pinnumber=33
T 3700 750 5 8 0 1 0 2 1
pinseq=32
T 3550 800 9 8 1 1 0 6 1
pinlabel=\_WR\_
T 3550 800 5 8 0 1 0 8 1
pintype=out
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V 3650 800 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 3900 1200 3700 1200 1 0 0
{
T 3700 1250 5 8 1 1 0 0 1
pinnumber=34
T 3700 1150 5 8 0 1 0 2 1
pinseq=33
T 3550 1200 9 8 1 1 0 6 1
pinlabel=\_RD\_
T 3550 1200 5 8 0 1 0 8 1
pintype=out
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V 3650 1200 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 3900 2200 3600 2200 1 0 0
{
T 3700 2250 5 8 1 1 0 0 1
pinnumber=54
T 3700 2150 5 8 0 1 0 2 1
pinseq=34
T 3550 2200 9 8 1 1 0 6 1
pinlabel=(ADC7) PF7
T 3550 2200 5 8 0 1 0 8 1
pintype=io
}
P 3900 2600 3600 2600 1 0 0
{
T 3700 2650 5 8 1 1 0 0 1
pinnumber=55
T 3700 2550 5 8 0 1 0 2 1
pinseq=35
T 3550 2600 9 8 1 1 0 6 1
pinlabel=(ADC6) PF6
T 3550 2600 5 8 0 1 0 8 1
pintype=io
}
P 3900 3000 3600 3000 1 0 0
{
T 3700 3050 5 8 1 1 0 0 1
pinnumber=56
T 3700 2950 5 8 0 1 0 2 1
pinseq=36
T 3550 3000 9 8 1 1 0 6 1
pinlabel=(ADC5) PF5
T 3550 3000 5 8 0 1 0 8 1
pintype=io
}
P 3900 3400 3600 3400 1 0 0
{
T 3700 3450 5 8 1 1 0 0 1
pinnumber=57
T 3700 3350 5 8 0 1 0 2 1
pinseq=37
T 3550 3400 9 8 1 1 0 6 1
pinlabel=(ADC4) PF4
T 3550 3400 5 8 0 1 0 8 1
pintype=io
}
P 3900 3800 3600 3800 1 0 0
{
T 3700 3850 5 8 1 1 0 0 1
pinnumber=58
T 3700 3750 5 8 0 1 0 2 1
pinseq=38
T 3550 3800 9 8 1 1 0 6 1
pinlabel=(ADC3) PF3
T 3550 3800 5 8 0 1 0 8 1
pintype=io
}
P 3900 4200 3600 4200 1 0 0
{
T 3700 4250 5 8 1 1 0 0 1
pinnumber=59
T 3700 4150 5 8 0 1 0 2 1
pinseq=39
T 3550 4200 9 8 1 1 0 6 1
pinlabel=(ADC2) PF2
T 3550 4200 5 8 0 1 0 8 1
pintype=io
}
P 3900 4600 3600 4600 1 0 0
{
T 3700 4650 5 8 1 1 0 0 1
pinnumber=60
T 3700 4550 5 8 0 1 0 2 1
pinseq=40
T 3550 4600 9 8 1 1 0 6 1
pinlabel=(ADC1) PF1
T 3550 4600 5 8 0 1 0 8 1
pintype=io
}
P 3900 5000 3600 5000 1 0 0
{
T 3700 5050 5 8 1 1 0 0 1
pinnumber=61
T 3700 4950 5 8 0 1 0 2 1
pinseq=41
T 3550 5000 9 8 1 1 0 6 1
pinlabel=(ADC0) PF0
T 3550 5000 5 8 0 1 0 8 1
pintype=io
}
P 3900 5600 3600 5600 1 0 0
{
T 3700 5650 5 8 1 1 0 0 1
pinnumber=42
T 3700 5550 5 8 0 1 0 2 1
pinseq=42
T 3550 5600 9 8 1 1 0 6 1
pinlabel=(A15) PC7
T 3550 5600 5 8 0 1 0 8 1
pintype=io
}
P 3900 6000 3600 6000 1 0 0
{
T 3700 6050 5 8 1 1 0 0 1
pinnumber=41
T 3700 5950 5 8 0 1 0 2 1
pinseq=43
T 3550 6000 9 8 1 1 0 6 1
pinlabel=(A14) PC6
T 3550 6000 5 8 0 1 0 8 1
pintype=io
}
P 3900 6400 3600 6400 1 0 0
{
T 3700 6450 5 8 1 1 0 0 1
pinnumber=40
T 3700 6350 5 8 0 1 0 2 1
pinseq=44
T 3550 6400 9 8 1 1 0 6 1
pinlabel=(A13) PC5
T 3550 6400 5 8 0 1 0 8 1
pintype=io
}
P 3900 6800 3600 6800 1 0 0
{
T 3700 6850 5 8 1 1 0 0 1
pinnumber=39
T 3700 6750 5 8 0 1 0 2 1
pinseq=45
T 3550 6800 9 8 1 1 0 6 1
pinlabel=(A12) PC4
T 3550 6800 5 8 0 1 0 8 1
pintype=io
}
P 3900 7200 3600 7200 1 0 0
{
T 3700 7250 5 8 1 1 0 0 1
pinnumber=38
T 3700 7150 5 8 0 1 0 2 1
pinseq=46
T 3550 7200 9 8 1 1 0 6 1
pinlabel=(A11) PC3
T 3550 7200 5 8 0 1 0 8 1
pintype=io
}
P 3900 7600 3600 7600 1 0 0
{
T 3700 7650 5 8 1 1 0 0 1
pinnumber=37
T 3700 7550 5 8 0 1 0 2 1
pinseq=47
T 3550 7600 9 8 1 1 0 6 1
pinlabel=(A10) PC2
T 3550 7600 5 8 0 1 0 8 1
pintype=io
}
P 3900 8000 3600 8000 1 0 0
{
T 3700 8050 5 8 1 1 0 0 1
pinnumber=36
T 3700 7950 5 8 0 1 0 2 1
pinseq=48
T 3550 8000 9 8 1 1 0 6 1
pinlabel=(A9) PC1
T 3550 8000 5 8 0 1 0 8 1
pintype=io
}
P 3900 8400 3600 8400 1 0 0
{
T 3700 8450 5 8 1 1 0 0 1
pinnumber=35
T 3700 8350 5 8 0 1 0 2 1
pinseq=49
T 3550 8400 9 8 1 1 0 6 1
pinlabel=(A8) PC0
T 3550 8400 5 8 0 1 0 8 1
pintype=io
}
P 3900 9000 3600 9000 1 0 0
{
T 3700 9050 5 8 1 1 0 0 1
pinnumber=44
T 3700 8950 5 8 0 1 0 2 1
pinseq=50
T 3550 9000 9 8 1 1 0 6 1
pinlabel=(AD7) PA7
T 3550 9000 5 8 0 1 0 8 1
pintype=io
}
P 3900 9400 3600 9400 1 0 0
{
T 3700 9450 5 8 1 1 0 0 1
pinnumber=45
T 3700 9350 5 8 0 1 0 2 1
pinseq=51
T 3550 9400 9 8 1 1 0 6 1
pinlabel=(AD6) PA6
T 3550 9400 5 8 0 1 0 8 1
pintype=io
}
P 3900 9800 3600 9800 1 0 0
{
T 3700 9850 5 8 1 1 0 0 1
pinnumber=46
T 3700 9750 5 8 0 1 0 2 1
pinseq=52
T 3550 9800 9 8 1 1 0 6 1
pinlabel=(AD5) PA5
T 3550 9800 5 8 0 1 0 8 1
pintype=io
}
P 3900 10200 3600 10200 1 0 0
{
T 3700 10250 5 8 1 1 0 0 1
pinnumber=47
T 3700 10150 5 8 0 1 0 2 1
pinseq=53
T 3550 10200 9 8 1 1 0 6 1
pinlabel=(AD4) PA4
T 3550 10200 5 8 0 1 0 8 1
pintype=io
}
P 3900 10600 3600 10600 1 0 0
{
T 3700 10650 5 8 1 1 0 0 1
pinnumber=48
T 3700 10550 5 8 0 1 0 2 1
pinseq=54
T 3550 10600 9 8 1 1 0 6 1
pinlabel=(AD3) PA3
T 3550 10600 5 8 0 1 0 8 1
pintype=io
}
P 3900 11000 3600 11000 1 0 0
{
T 3700 11050 5 8 1 1 0 0 1
pinnumber=49
T 3700 10950 5 8 0 1 0 2 1
pinseq=55
T 3550 11000 9 8 1 1 0 6 1
pinlabel=(AD2) PA2
T 3550 11000 5 8 0 1 0 8 1
pintype=io
}
P 3900 11400 3600 11400 1 0 0
{
T 3700 11450 5 8 1 1 0 0 1
pinnumber=50
T 3700 11350 5 8 0 1 0 2 1
pinseq=56
T 3550 11400 9 8 1 1 0 6 1
pinlabel=(AD1) PA1
T 3550 11400 5 8 0 1 0 8 1
pintype=io
}
P 3900 11800 3600 11800 1 0 0
{
T 3700 11850 5 8 1 1 0 0 1
pinnumber=51
T 3700 11750 5 8 0 1 0 2 1
pinseq=57
T 3550 11800 9 8 1 1 0 6 1
pinlabel=(AD0) PA0
T 3550 11800 5 8 0 1 0 8 1
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}
P 3900 1600 3600 1600 1 0 0
{
T 3700 1650 5 8 1 1 0 0 1
pinnumber=43
T 3700 1550 5 8 0 1 0 2 1
pinseq=58
T 3550 1600 9 8 1 1 0 6 1
pinlabel=ALE
T 3550 1600 5 8 0 1 0 8 1
pintype=out
}
B 400 400 3200 11800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 13650 5 10 0 0 0 0 1
description=8-bit RISC micro controller (Atmel)
T 400 13850 5 10 0 0 0 0 1
numslots=0
T 400 14050 5 10 0 0 0 0 1
author=Werner Hoch <werner.hoATgmx.de>
T 400 12250 9 10 1 0 0 0 1
ATmega103
|