/usr/share/gEDA/sym/verilog/and8-2.sym is in geda-symbols 1:1.6.2-4.3.
This file is owned by root:root, with mode 0o644.
The actual contents of the file can be viewed below.
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L 300 1100 600 1100 3 0 0 0 -1 -1
L 300 500 600 500 3 0 0 0 -1 -1
A 40 800 400 312 97 3 0 0 0 -1 -1
A 600 900 400 270 76 3 0 0 0 -1 -1
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L 300 500 300 0 3 0 0 0 -1 -1
V 1050 800 50 6 0 0 0 -1 -1 0 0 -1 -1 -1 -1
P 1100 800 1300 800 1 0 1
{
T 1000 800 5 8 0 0 0 0 1
pinnumber=OUT
T 1000 800 5 8 0 0 0 0 1
pinseq=1
}
V 250 100 50 6 0 0 0 -1 -1 0 0 -1 -1 -1 -1
P 200 100 0 100 1 0 1
{
T 300 100 5 8 0 0 0 0 1
pinnumber=IN0
T 300 100 5 8 0 0 0 0 1
pinseq=2
}
V 250 300 50 6 0 0 0 -1 -1 0 0 -1 -1 -1 -1
P 200 300 0 300 1 0 1
{
T 300 300 5 8 0 0 0 0 1
pinnumber=IN1
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pinseq=3
}
V 250 500 50 6 0 0 0 -1 -1 0 0 -1 -1 -1 -1
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{
T 300 500 5 8 0 0 0 0 1
pinnumber=IN2
T 300 500 5 8 0 0 0 0 1
pinseq=4
}
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{
T 300 700 5 8 0 0 0 0 1
pinnumber=IN3
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pinseq=5
}
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{
T 300 900 5 8 0 0 0 0 1
pinnumber=IN4
T 300 900 5 8 0 0 0 0 1
pinseq=6
}
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{
T 300 1100 5 8 0 0 0 0 1
pinnumber=IN5
T 300 1100 5 8 0 0 0 0 1
pinseq=7
}
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{
T 300 1300 5 8 0 0 0 0 1
pinnumber=IN6
T 300 1300 5 8 0 0 0 0 1
pinseq=8
}
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P 200 1500 0 1500 1 0 1
{
T 300 1500 5 8 0 0 0 0 1
pinnumber=IN7
T 300 1500 5 8 0 0 0 0 1
pinseq=9
}
T 400 400 5 10 1 1 0 2 1
refdes=U?
T 400 100 5 8 0 0 0 0 1
device=and
T 400 200 5 8 0 0 0 0 1
VERILOG_PORTS=POSITIONAL
|