/usr/share/drmips/cpu/unicycle-no-jump-branch.cpu is in drmips 2.0.1-2.
This file is owned by root:root, with mode 0o644.
The actual contents of the file can be viewed below.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 | {
"components": {
"PC": {"type": "PC", "x": 40, "y": 150, "in": "NewPC", "out": "PC"},
"PCAdder": {"type": "Add", "latency": 50, "x": 110, "y": 58, "in1": "In1", "in2": "In2", "out": "PC+4", "desc": {"default": "Calculates the address of the next sequential instruction.", "pt": "Calcula o endereço da instrução sequencial seguinte."}},
"Const4": {"type": "Constant", "x": 85, "y": 73, "out": "Out", "val": 4, "size": 32},
"RegBank": {"type": "RegBank", "latency": 100, "x": 250, "y": 115, "num_regs": 32, "read_reg1": "ReadReg1", "read_reg2": "ReadReg2", "read_data1": "ReadData1", "read_data2": "ReadData2", "write_reg": "WriteReg", "write_data": "WriteData", "reg_write": "RegWrite", "const_regs": [{"reg": 0, "val": 0}]},
"InstMem": {"type": "InstructionMemory", "latency": 300, "x": 90, "y": 115, "in": "Address", "out": "Instruction"},
"ForkPC": {"type": "Fork", "x": 80, "y": 165, "size": 32, "in": "In", "out": ["Out1", "Out2"]},
"Control": {"type": "ControlUnit", "latency": 50, "x": 220, "y": 10, "in": "Opcode"},
"DistInst": {"type": "Distributor", "x": 180, "y": 150, "in": {"id": "Instruction", "size": 32}, "out": [{"id": "31-26", "msb": 31, "lsb": 26}, {"msb": 25, "lsb": 21}, {"msb": 20, "lsb": 16}, {"msb": 15, "lsb": 11}, {"msb": 15, "lsb": 0}, {"msb": 25, "lsb": 0}]},
"MuxDst": {"type": "Multiplexer", "latency": 15, "x": 205, "y": 160, "size": 5, "sel": "RegDst", "out": "Out", "in": ["0", "1"], "desc": {"default": "Selects the instruction's rt or rd field as the destination register (WriteReg).", "pt": "Selecciona o campo rt ou rd da instrução como registo de destino (WriteReg)."}},
"ForkRt": {"type": "Fork", "x": 200, "y": 165, "size": 5, "in": "In", "out": ["Out1", "Out2"]},
"DistImm": {"type": "Distributor", "x": 255, "y": 240, "in": {"id": "In", "size": 16}, "out": [{"msb": 15, "lsb": 0}, {"msb": 5, "lsb": 0}]},
"ExtendImm": {"type": "SignExtend", "x": 280, "y": 230, "in": {"id": "In", "size": 16}, "out": {"id": "Out", "size": 32}, "desc": {"default": "Extends the instruction's immediate value from 16 to 32 bits, in the case it is an I-type instruction.", "pt": "Estende o valor imediato da instrução de 16 para 32 bits, no caso de ser uma instrução do tipo I."}},
"MuxReg": {"type": "Multiplexer", "latency": 15, "x": 350, "y": 170, "size": 32, "sel": "ALUSrc", "out": "Out", "in": ["0", "1"], "desc": {"default": "Selects the value of the 2nd read register or the instruction's immediate value as the ALU's second operand.", "pt": "Selecciona o valor do 2º registo lido ou o valor imediato da instrução como segundo operando da ALU."}},
"ALUControl": {"type": "ALUControl", "latency": 50, "x": 360, "y": 230, "aluop": "ALUOp", "func": "func"},
"ALU": {"type": "ALU", "latency": 100, "x": 400, "y": 137, "in1": "In1", "in2": "In2", "control": "Operation", "out": "Result", "zero": "Zero", "desc": {"default": "Performs arithmetic operations.\nThe output is the result of the operation.", "pt": "Realiza operações aritméticas.\nA saída é o resultado da operação."}},
"ForkMem": {"type": "Fork", "x": 470, "y": 175, "size": 32, "in": "In", "out": ["Out1", "Out2"]},
"ForkReg": {"type": "Fork", "x": 335, "y": 181, "size": 32, "in": "In", "out": ["Out1", "Out2"]},
"DataMem": {"type": "DataMemory", "latency": 400, "x": 480, "y": 142, "size": 100, "address": "Address", "write_data": "WriteData", "out": "ReadData", "mem_read": "MemRead", "mem_write": "MemWrite"},
"MuxMem": {"type": "Multiplexer", "latency": 15, "x": 580, "y": 170, "size": 32, "sel": "MemToReg", "in": ["0", "1"], "out": "Out", "desc": {"default": "Selects the result of the ALU or the value read from memory to write to the destination register (WriteData).", "pt": "Selecciona o resultado da ALU ou o valor lido da memória para escrever no registo de destino (WriteData)."}}
},
"wires": [
{"from": "PC", "out": "PC", "to": "ForkPC", "in": "In"},
{"from": "Const4", "out": "Out", "to": "PCAdder", "in": "In2"},
{"from": "ForkPC", "out": "Out1", "to": "PCAdder", "in": "In1", "points": [{"x": 80, "y": 69}]},
{"from": "ForkPC", "out": "Out2", "to": "InstMem", "in": "Address"},
{"from": "PCAdder", "out": "PC+4", "to": "PC", "in": "NewPC", "points": [{"x": 155, "y": 75}, {"x": 155, "y": 40}, {"x": 30, "y": 40}, {"x": 30, "y": 165}]},
{"from": "Control", "out": "RegWrite", "to": "RegBank", "in": "RegWrite", "start": {"x": 280, "y": 100}, "points": [{"x": 290, "y": 100}]},
{"from": "InstMem", "out": "Instruction", "to": "DistInst", "in": "Instruction"},
{"from": "DistInst", "out": "31-26", "to": "Control", "in": "Opcode", "start": {"x": 185, "y": 155}, "points": [{"x": 190, "y": 155}, {"x": 190, "y": 60}]},
{"from": "DistInst", "out": "25-21", "to": "RegBank", "in": "ReadReg1", "start": {"x": 185, "y": 160}, "points": [{"x": 195, "y": 160}, {"x": 195, "y": 135}]},
{"from": "DistInst", "out": "20-16", "to": "ForkRt", "in": "In", "start": {"x": 185, "y": 165}},
{"from": "ForkRt", "out": "Out1", "to": "RegBank", "in": "ReadReg2", "points": [{"x": 200, "y": 155}]},
{"from": "ForkRt", "out": "Out2", "to": "MuxDst", "in": "0", "points": [{"x": 200, "y": 171}]},
{"from": "DistInst", "out": "15-11", "to": "MuxDst", "in": "1", "start": {"x": 185, "y": 170}, "points": [{"x": 195, "y": 170}, {"x": 195, "y": 182}]},
{"from": "DistInst", "out": "15-0", "to": "DistImm", "in": "In", "start": {"x": 185, "y": 175}, "points": [{"x": 190, "y": 175}, {"x": 190, "y": 255}]},
{"from": "MuxDst", "out": "Out", "to": "RegBank", "in": "WriteReg", "end": {"x": 250, "y": 177}},
{"from": "Control", "out": "RegDst", "to": "MuxDst", "in": "RegDst", "start": {"x": 280, "y": 20}, "points": [{"x": 290, "y": 20}, {"x": 290, "y": 5}, {"x": 212, "y": 5}]},
{"from": "DistImm", "out": "15-0", "to": "ExtendImm", "in": "In"},
{"from": "Control", "out": "ALUSrc", "to": "MuxReg", "in": "ALUSrc", "start": {"x": 280, "y": 90}, "points": [{"x": 357, "y": 90}]},
{"from": "RegBank", "out": "ReadData2", "to": "ForkReg", "in": "In"},
{"from": "ForkReg", "out": "Out1", "to": "MuxReg", "in": "0"},
{"from": "ExtendImm", "out": "Out", "to": "MuxReg", "in": "1", "points": [{"x": 340, "y": 250}, {"x": 340, "y": 192}]},
{"from": "DistImm", "out": "5-0", "to": "ALUControl", "in": "func", "points": [{"x": 265, "y": 260}, {"x": 265, "y": 280}, {"x": 350, "y": 280}, {"x": 350, "y": 250}]},
{"from": "Control", "out": "ALUOp", "to": "ALUControl", "in": "ALUOp", "start": {"x": 280, "y": 80}, "points": [{"x": 380, "y": 80}]},
{"from": "RegBank", "out": "ReadData1", "to": "ALU", "in": "In1", "end": {"x": 400, "y": 148}},
{"from": "MuxReg", "out": "Out", "to": "ALU", "in": "In2", "end": {"x": 400, "y": 187}},
{"from": "ALUControl", "out": "Operation", "to": "ALU", "in": "Operation", "points": [{"x": 430, "y": 250}]},
{"from": "ALU", "out": "Result", "to": "ForkMem", "in": "In", "start": {"x": 460, "y": 175}},
{"from": "ForkMem", "out": "Out1", "to": "DataMem", "in": "Address"},
{"from": "ForkReg", "out": "Out2", "to": "DataMem", "in": "WriteData", "points": [{"x": 335, "y": 208}]},
{"from": "Control", "out": "MemRead", "to": "DataMem", "in": "MemRead", "start": {"x": 280, "y": 70}, "points": [{"x": 506, "y": 70}]},
{"from": "Control", "out": "MemWrite", "to": "DataMem", "in": "MemWrite", "start": {"x": 280, "y": 60}, "points": [{"x": 532, "y": 60}]},
{"from": "Control", "out": "MemToReg", "to": "MuxMem", "in": "MemToReg", "start": {"x": 280, "y": 50}, "points": [{"x": 587, "y": 50}]},
{"from": "DataMem", "out": "ReadData", "to": "MuxMem", "in": "1"},
{"from": "ForkMem", "out": "Out2", "to": "MuxMem", "in": "0", "points": [{"x": 470, "y": 252}, {"x": 570, "y": 252}, {"x": 570, "y": 181}]},
{"from": "MuxMem", "out": "Out", "to": "RegBank", "in": "WriteData", "end": {"x": 250, "y": 197}, "points": [{"x": 600, "y": 187}, {"x": 600, "y": 300}, {"x": 240, "y": 300}, {"x": 240, "y": 197}]}
],
"reg_names": ["zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", "t8", "t9", "k0", "k1", "gp", "sp", "fp", "ra"],
"instructions": "default-no-jump-branch.set"
}
|