/usr/share/gputils/header/p16f84.inc is in gputils-common 1.4.0-0.1build1.
This file is owned by root:root, with mode 0o644.
The actual contents of the file can be viewed below.
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;==========================================================================
; Build date : Aug 07 2014
; MPASM PIC16F84 processor include
;
; (c) Copyright 1999-2014 Microchip Technology, All rights reserved
;==========================================================================
NOLIST
;==========================================================================
; This header file defines configurations, registers, and other useful
; bits of information for the PIC16F84 microcontroller. These names
; are taken to match the data sheets as closely as possible.
;
; Note that the processor must be selected before this file is included.
; The processor may be selected the following ways:
;
; 1. Command line switch:
; C:\MPASM MYFILE.ASM /PIC16F84
; 2. LIST directive in the source file
; LIST P=PIC16F84
; 3. Processor Type entry in the MPASM full-screen interface
; 4. Setting the processor in the MPLAB Project Dialog
;==========================================================================
;==========================================================================
;
; Verify Processor
;
;==========================================================================
IFNDEF __16F84
MESSG "Processor-header file mismatch. Verify selected processor."
ENDIF
;==========================================================================
;
; Register Definitions
;
;==========================================================================
W EQU H'0000'
F EQU H'0001'
;----- Register Files -----------------------------------------------------
;-----Bank0------------------
INDF EQU H'0000'
TMR0 EQU H'0001'
PCL EQU H'0002'
STATUS EQU H'0003'
FSR EQU H'0004'
PORTA EQU H'0005'
PORTB EQU H'0006'
EEDATA EQU H'0008'
EEADR EQU H'0009'
PCLATH EQU H'000A'
INTCON EQU H'000B'
;-----Bank1------------------
OPTION_REG EQU H'0081'
TRISA EQU H'0085'
TRISB EQU H'0086'
EECON1 EQU H'0088'
EECON2 EQU H'0089'
;----- STATUS Bits -----------------------------------------------------
C EQU H'0000'
DC EQU H'0001'
Z EQU H'0002'
NOT_PD EQU H'0003'
NOT_TO EQU H'0004'
IRP EQU H'0007'
RP0 EQU H'0005'
RP1 EQU H'0006'
;----- PORTA Bits -----------------------------------------------------
RA0 EQU H'0000'
RA1 EQU H'0001'
RA2 EQU H'0002'
RA3 EQU H'0003'
RA4 EQU H'0004'
;----- PORTB Bits -----------------------------------------------------
RB0 EQU H'0000'
RB1 EQU H'0001'
RB2 EQU H'0002'
RB3 EQU H'0003'
RB4 EQU H'0004'
RB5 EQU H'0005'
RB6 EQU H'0006'
RB7 EQU H'0007'
;----- INTCON Bits -----------------------------------------------------
RBIF EQU H'0000'
INTF EQU H'0001'
T0IF EQU H'0002'
RBIE EQU H'0003'
INTE EQU H'0004'
T0IE EQU H'0005'
EEIE EQU H'0006'
GIE EQU H'0007'
TMR0IF EQU H'0002'
TMR0IE EQU H'0005'
;----- OPTION_REG Bits -----------------------------------------------------
PSA EQU H'0003'
T0SE EQU H'0004'
T0CS EQU H'0005'
INTEDG EQU H'0006'
NOT_RBPU EQU H'0007'
PS0 EQU H'0000'
PS1 EQU H'0001'
PS2 EQU H'0002'
;----- TRISA Bits -----------------------------------------------------
TRISA0 EQU H'0000'
TRISA1 EQU H'0001'
TRISA2 EQU H'0002'
TRISA3 EQU H'0003'
TRISA4 EQU H'0004'
;----- TRISB Bits -----------------------------------------------------
TRISB0 EQU H'0000'
TRISB1 EQU H'0001'
TRISB2 EQU H'0002'
TRISB3 EQU H'0003'
TRISB4 EQU H'0004'
TRISB5 EQU H'0005'
TRISB6 EQU H'0006'
TRISB7 EQU H'0007'
;----- EECON1 Bits -----------------------------------------------------
RD EQU H'0000'
WR EQU H'0001'
WREN EQU H'0002'
WRERR EQU H'0003'
EEIF EQU H'0004'
;==========================================================================
;
; RAM Definitions
;
;==========================================================================
__MAXRAM H'00CF'
__BADRAM H'0007'
__BADRAM H'0050'-H'007F'
__BADRAM H'0087'
;==========================================================================
;
; Configuration Bits
;
; NAME Address
; CONFIG 2007h
;
;==========================================================================
; The following is an assignment of address values for all of the
; configuration registers for the purpose of table reads
_CONFIG EQU H'2007'
;----- CONFIG Options --------------------------------------------------
_FOSC_LP EQU H'3FFC' ; LP oscillator
_LP_OSC EQU H'3FFC' ; LP oscillator
_FOSC_XT EQU H'3FFD' ; XT oscillator
_XT_OSC EQU H'3FFD' ; XT oscillator
_FOSC_HS EQU H'3FFE' ; HS oscillator
_HS_OSC EQU H'3FFE' ; HS oscillator
_FOSC_EXTRC EQU H'3FFF' ; RC oscillator
_RC_OSC EQU H'3FFF' ; RC oscillator
_WDTE_OFF EQU H'3FFB' ; WDT disabled
_WDT_OFF EQU H'3FFB' ; WDT disabled
_WDTE_ON EQU H'3FFF' ; WDT enabled
_WDT_ON EQU H'3FFF' ; WDT enabled
_PWRTE_ON EQU H'3FF7' ; Power-up Timer is enabled
_PWRTE_OFF EQU H'3FFF' ; Power-up Timer is disabled
_CP_ON EQU H'000F' ; All program memory is code protected
_CP_OFF EQU H'3FFF' ; Code protection disabled
;----- IDLOC Equates --------------------------------------------------
_IDLOC0 EQU H'2000'
_IDLOC1 EQU H'2001'
_IDLOC2 EQU H'2002'
_IDLOC3 EQU H'2003'
LIST
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