/usr/share/pcb/m4/memory.m4 is in pcb-common 20110918-4.
This file is owned by root:root, with mode 0o644.
The actual contents of the file can be viewed below.
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#
# COPYRIGHT
#
# PCB, interactive printed circuit board design
# Copyright (C) 1994,1995,1996 Thomas Nau
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
#
# Contact addresses for paper mail and Email:
# Thomas Nau, Schlehenweg 15, 88471 Baustetten, Germany
# Thomas.Nau@rz.uni-ulm.de
#
# RCS: $Id$
#
define(`Description_27512_dil', `EPROM 64Kx8')
define(`Param1_27512_dil', 28)
define(`Param2_27512_dil', 600)
define(`PinList_27512_dil', ``A15',`A12',`A7',`A6',`A5',`A4',`A3',`A2',`A1',`A0',`D0',`D1',`D2',`Gnd',`D3',`D4',`D5',`D6',`D7',`/Cs',`A10',`/Oe',`A11',`A9',`A8',`A13',`A14',`Vcc'')
define(`Description_511000_dil', `DRAM 1Mx1')
define(`Param1_511000_dil', 18)
define(`Param2_511000_dil', 300)
define(`PinList_511000_dil', ``Din',`/We',`/Ras',`TF',`A0',`A1',`A2',`A3',`Vcc',`A4',`A5',`A6',`A7',`A8',`A9',`/Cas',`Dout',`Gnd'')
define(`Description_514100_dil', `DRAM 4Mx1')
define(`Param1_514100_dil', 18)
define(`Param2_514100_dil', 300)
define(`PinList_514100_dil', ``Din',`/We',`/Ras',`A0',`A1',`A2',`A3',`A4',`Vcc',`A5',`A6',`A7',`A8',`A9',`A10',`/Cas',`Dout',`Gnd'')
define(`Description_43256_dil', `SRAM 32Kx8')
define(`Param1_43256_dil', 28)
define(`Param2_43256_dil', 600)
define(`PinList_43256_dil', ``A14',`A12',`A7',`A6',`A5',`A4',`A3',`A2',`A1',`A0',`D0',`D1',`D2',`GND',`D3',`D4',`D5',`D6',`D7',`/CS',`A10',`/OE',`A11',`A9',`A8',`A13',`/WE',`Vcc'')
define(`Description_628128_dil', `SRAM 128Kx8')
define(`Param1_628128_dil', 32)
define(`Param2_628128_dil', 600)
define(`PinList_628128_dil', ``NC',`A16',`A14',`A12',`A7',`A6',`A5',`A4',`A3',`A2',`A1',`A0',`D0',`D1',`D2',`GND',`D3',`D4',`D5',`D6',`D7',`/CS',`A10',`/OE',`A11',`A9',`A8',`A13',`/WE',`NC',`A15',`Vcc'')
define(`Description_44251_zip', `VRAM 256Kx4')
define(`Param1_44251_zip', 28)
define(`PinList_44251_zip', ``DSF',`DQ2',`DQ3',`/SE',`SDQ2',`SDQ3',`Vss',`SC',`SDQ0',`SDQ1',`/TRG',`DQ0',`DQ1',`/W',`NC-Gnd',`/RAS',`A8',`A6',`A5',`A4',`Vcc',`A7',`A3',`A2',`A1',`A0',`QSF',`/CAS'')
(divert(0)dnl
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