/usr/share/sdcc/include/pic/pic16c433.h is in sdcc-libraries 2.9.0-5.
This file is owned by root:root, with mode 0o644.
The actual contents of the file can be viewed below.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 | //
// Register Declarations for Microchip 16C433 Processor
//
//
// This header file was automatically generated by:
//
// inc2h.pl V4783
//
// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
//
// SDCC is licensed under the GNU Public license (GPL) v2. Note that
// this license covers the code to the compiler and other executables,
// but explicitly does not cover any code or objects generated by sdcc.
// We have not yet decided on a license for the run time libraries, but
// it will not put any requirements on code linked against it. See:
//
// http://www.gnu.org/copyleft/gpl/html
//
// See http://sdcc.sourceforge.net/ for the latest information on sdcc.
//
//
#ifndef P16C433_H
#define P16C433_H
//
// Register addresses.
//
#define INDF_ADDR 0x0000
#define TMR0_ADDR 0x0001
#define PCL_ADDR 0x0002
#define STATUS_ADDR 0x0003
#define FSR_ADDR 0x0004
#define GPIO_ADDR 0x0005
#define PCLATH_ADDR 0x000A
#define INTCON_ADDR 0x000B
#define PIR1_ADDR 0x000C
#define ADRES_ADDR 0x001E
#define ADCON0_ADDR 0x001F
#define OPTION_REG_ADDR 0x0081
#define TRISIO_ADDR 0x0085
#define PIE1_ADDR 0x008C
#define PCON_ADDR 0x008E
#define OSCCAL_ADDR 0x008F
#define ADCON1_ADDR 0x009F
//
// Memory organization.
//
// LIST
// P16C433.INC Standard Header File, Version 1.00 Microchip Technology, Inc.
// NOLIST
// This header file defines configurations, registers, and other useful bits of
// information for the PIC16C433 microcontroller. These names are taken to match
// the data sheets as closely as possible.
// Note that the processor must be selected before this file is
// included. The processor may be selected the following ways:
// 1. Command line switch:
// C:\ MPASM MYFILE.ASM /PIC16C433
// 2. LIST directive in the source file
// LIST P=PIC16C433
// 3. Processor Type entry in the MPASM full-screen interface
//==========================================================================
//
// Revision History
//
//==========================================================================
//Rev: Date: Reason:
//1.00 31 Aug 2000 Original Release
//1.10 28 Mar 2001 Corrected definitions of LINTX and LINRX.
//==========================================================================
//
// Verify Processor
//
//==========================================================================
// IFNDEF __16C433
// MESSG "Processor-header file mismatch. Verify selected processor."
// ENDIF
//==========================================================================
//
// Register Definitions
//
//==========================================================================
#define W 0x0000
#define F 0x0001
//----- Register Files------------------------------------------------------
extern __sfr __at (INDF_ADDR) INDF;
extern __sfr __at (TMR0_ADDR) TMR0;
extern __sfr __at (PCL_ADDR) PCL;
extern __sfr __at (STATUS_ADDR) STATUS;
extern __sfr __at (FSR_ADDR) FSR;
extern __sfr __at (GPIO_ADDR) GPIO;
extern __sfr __at (PCLATH_ADDR) PCLATH;
extern __sfr __at (INTCON_ADDR) INTCON;
extern __sfr __at (PIR1_ADDR) PIR1;
extern __sfr __at (ADRES_ADDR) ADRES;
extern __sfr __at (ADCON0_ADDR) ADCON0;
extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
extern __sfr __at (TRISIO_ADDR) TRISIO;
extern __sfr __at (PIE1_ADDR) PIE1;
extern __sfr __at (PCON_ADDR) PCON;
extern __sfr __at (OSCCAL_ADDR) OSCCAL;
extern __sfr __at (ADCON1_ADDR) ADCON1;
//----- STATUS Bits --------------------------------------------------------
//----- LIN Port bits (within GPIO) ----------------------------------------
//----- ADCON0 Bits --------------------------------------------------------
//----- INTCON Bits --------------------------------------------------------
//----- PIR1 Bits ----------------------------------------------------------
//----- OPTION Bits --------------------------------------------------------
//----- PIE1 Bits ----------------------------------------------------------
//----- PCON Bits ----------------------------------------------------------
//----- OSCCAL Bits --------------------------------------------------------
//----- ADCON1 Bits --------------------------------------------------------
//==========================================================================
//
// RAM Definition
//
//==========================================================================
// __MAXRAM H'FF'
// __BADRAM H'06'-H'09', H'0D'-H'1D'
// __BADRAM H'86'-H'89', H'8D', H'90'-H'9E', H'C0'-H'EF'
//==========================================================================
//
// Configuration Bits
//
//==========================================================================
#define _MCLRE_ON 0x3FFF
#define _MCLRE_OFF 0x3F7F
#define _CP_ALL 0x009F
#define _CP_75 0x15BF
#define _CP_50 0x2ADF
#define _CP_OFF 0x3FFF
#define _PWRTE_OFF 0x3FFF
#define _PWRTE_ON 0x3FEF
#define _WDT_ON 0x3FFF
#define _WDT_OFF 0x3FF7
#define _LP_OSC 0x3FF8
#define _XT_OSC 0x3FF9
#define _HS_OSC 0x3FFA
#define _INTRC_OSC 0x3FFC
#define _INTRC_OSC_NOCLKOUT 0x3FFC
#define _INTRC_OSC_CLKOUT 0x3FFD
#define _EXTRC_OSC 0x3FFE
#define _EXTRC_OSC_NOCLKOUT 0x3FFE
#define _EXTRC_OSC_CLKOUT 0x3FFF
// LIST
// ----- ADCON0 bits --------------------
typedef union {
struct {
unsigned char ADON:1;
unsigned char :1;
unsigned char GO:1;
unsigned char CHS0:1;
unsigned char CHS1:1;
unsigned char :1;
unsigned char ADCS0:1;
unsigned char ADCS1:1;
};
struct {
unsigned char :1;
unsigned char :1;
unsigned char NOT_DONE:1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
};
struct {
unsigned char :1;
unsigned char :1;
unsigned char GO_DONE:1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
};
} __ADCON0_bits_t;
extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
#ifndef NO_BIT_DEFINES
#define ADON ADCON0_bits.ADON
#define GO ADCON0_bits.GO
#define NOT_DONE ADCON0_bits.NOT_DONE
#define GO_DONE ADCON0_bits.GO_DONE
#define CHS0 ADCON0_bits.CHS0
#define CHS1 ADCON0_bits.CHS1
#define ADCS0 ADCON0_bits.ADCS0
#define ADCS1 ADCON0_bits.ADCS1
#endif /* NO_BIT_DEFINES */
// ----- ADCON1 bits --------------------
typedef union {
struct {
unsigned char PCFG0:1;
unsigned char PCFG1:1;
unsigned char PCFG2:1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
};
} __ADCON1_bits_t;
extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
#ifndef NO_BIT_DEFINES
#define PCFG0 ADCON1_bits.PCFG0
#define PCFG1 ADCON1_bits.PCFG1
#define PCFG2 ADCON1_bits.PCFG2
#endif /* NO_BIT_DEFINES */
// ----- INTCON bits --------------------
typedef union {
struct {
unsigned char GPIF:1;
unsigned char INTF:1;
unsigned char T0IF:1;
unsigned char GPIE:1;
unsigned char INTE:1;
unsigned char T0IE:1;
unsigned char PEIE:1;
unsigned char GIE:1;
};
} __INTCON_bits_t;
extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
#ifndef NO_BIT_DEFINES
#define GPIF INTCON_bits.GPIF
#define INTF INTCON_bits.INTF
#define T0IF INTCON_bits.T0IF
#define GPIE INTCON_bits.GPIE
#define INTE INTCON_bits.INTE
#define T0IE INTCON_bits.T0IE
#define PEIE INTCON_bits.PEIE
#define GIE INTCON_bits.GIE
#endif /* NO_BIT_DEFINES */
// ----- OPTION_REG bits --------------------
typedef union {
struct {
unsigned char PS0:1;
unsigned char PS1:1;
unsigned char PS2:1;
unsigned char PSA:1;
unsigned char T0SE:1;
unsigned char T0CS:1;
unsigned char INTEDG:1;
unsigned char NOT_GPPU:1;
};
} __OPTION_REG_bits_t;
extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
#ifndef NO_BIT_DEFINES
#define PS0 OPTION_REG_bits.PS0
#define PS1 OPTION_REG_bits.PS1
#define PS2 OPTION_REG_bits.PS2
#define PSA OPTION_REG_bits.PSA
#define T0SE OPTION_REG_bits.T0SE
#define T0CS OPTION_REG_bits.T0CS
#define INTEDG OPTION_REG_bits.INTEDG
#define NOT_GPPU OPTION_REG_bits.NOT_GPPU
#endif /* NO_BIT_DEFINES */
// ----- OSCCAL bits --------------------
typedef union {
struct {
unsigned char :1;
unsigned char :1;
unsigned char CALSLW:1;
unsigned char CALFST:1;
unsigned char CAL0:1;
unsigned char CAL1:1;
unsigned char CAL2:1;
unsigned char CAL3:1;
};
} __OSCCAL_bits_t;
extern volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits;
#ifndef NO_BIT_DEFINES
#define CALSLW OSCCAL_bits.CALSLW
#define CALFST OSCCAL_bits.CALFST
#define CAL0 OSCCAL_bits.CAL0
#define CAL1 OSCCAL_bits.CAL1
#define CAL2 OSCCAL_bits.CAL2
#define CAL3 OSCCAL_bits.CAL3
#endif /* NO_BIT_DEFINES */
// ----- PCON bits --------------------
typedef union {
struct {
unsigned char :1;
unsigned char NOT_POR:1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
};
} __PCON_bits_t;
extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
#ifndef NO_BIT_DEFINES
#define NOT_POR PCON_bits.NOT_POR
#endif /* NO_BIT_DEFINES */
// ----- PIE1 bits --------------------
typedef union {
struct {
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char ADIE:1;
unsigned char :1;
};
} __PIE1_bits_t;
extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
#ifndef NO_BIT_DEFINES
#define ADIE PIE1_bits.ADIE
#endif /* NO_BIT_DEFINES */
// ----- PIR1 bits --------------------
typedef union {
struct {
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char ADIF:1;
unsigned char :1;
};
} __PIR1_bits_t;
extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
#ifndef NO_BIT_DEFINES
#define ADIF PIR1_bits.ADIF
#endif /* NO_BIT_DEFINES */
// ----- STATUS bits --------------------
typedef union {
struct {
unsigned char C:1;
unsigned char DC:1;
unsigned char Z:1;
unsigned char NOT_PD:1;
unsigned char NOT_TO:1;
unsigned char RP0:1;
unsigned char RP1:1;
unsigned char IRP:1;
};
struct {
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char :1;
unsigned char LINRX:1;
unsigned char LINTX:1;
};
} __STATUS_bits_t;
extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
#ifndef NO_BIT_DEFINES
#define C STATUS_bits.C
#define DC STATUS_bits.DC
#define Z STATUS_bits.Z
#define NOT_PD STATUS_bits.NOT_PD
#define NOT_TO STATUS_bits.NOT_TO
#define RP0 STATUS_bits.RP0
#define RP1 STATUS_bits.RP1
#define LINRX STATUS_bits.LINRX
#define IRP STATUS_bits.IRP
#define LINTX STATUS_bits.LINTX
#endif /* NO_BIT_DEFINES */
#endif
|