/usr/include/gpsim/ssp.h is in gpsim-dev 0.26.1-1.
This file is owned by root:root, with mode 0o644.
The actual contents of the file can be viewed below.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 | /*
Copyright (C) 1998,1999 T. Scott Dattalo
2006 Roy R Rankin
This file is part of the libgpsim library of gpsim
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, see
<http://www.gnu.org/licenses/lgpl-2.1.html>.
*/
#include <stdio.h>
class InvalidRegister; // Forward reference
#ifndef __SSP_H__
#define __SSP_H__
#include "pic-processor.h"
#include "14bit-registers.h"
#include "ioports.h"
#include "pir.h"
class PinModule;
class PIR1;
class PIR_SET;
class _14bit_processor;
class PicTrisRegister;
class _SSPBUF;
class _SSPSTAT;
class SDI_SignalSink;
class SCL_SignalSink;
class SS_SignalSink;
enum SSP_TYPE {
SSP_TYPE_BSSP = 1,
SSP_TYPE_SSP,
SSP_TYPE_MSSP
};
class SSP_MODULE;
class _SSPCON : public sfr_register, public TriggerObject
{
public:
enum {
SSPM_SPImaster4 = 0x0, // SPI master mode, clock = FOSC/4
SSPM_SPImaster16 = 0x1, // SPI master mode, clock = FOSC/16
SSPM_SPImaster64 = 0x2, // SPI master mode, clock = FOSC/64
SSPM_SPImasterTMR2 = 0x3, // SPI master mode, clock = TMR2/2
SSPM_SPIslaveSS = 0x4, // SPI slave mode, clock = SCK, /SS controlled
SSPM_SPIslave = 0x5, // SPI slave mode, clock = SCK, not /SS controlled
SSPM_I2Cslave_7bitaddr = 0x6,
SSPM_I2Cslave_10bitaddr = 0x7,
SSPM_MSSPI2Cmaster = 0x8,
SSPM_I2Cfirmwaremaster = 0xb,
SSPM_I2Cslave_7bitaddr_ints = 0xe,
SSPM_I2Cslave_10bitaddr_ints = 0xf,
/* None of the documentation I have seen show these, but Scott? thought
they were the good name RRR
SSPM_I2Cfirmwaremultimaster_7bitaddr_ints = 0xe,
SSPM_I2Cfirmwaremaster_10bitaddr_ints = 0xf,
*/
};
_SSPCON(Processor *pCpu, SSP_MODULE *);
// Register bit definitions
enum {
SSPM0 = 1<<0,
SSPM1 = 1<<1,
SSPM2 = 1<<2,
SSPM3 = 1<<3,
CKP = 1<<4,
SSPEN = 1<<5,
SSPOV = 1<<6,
WCOL = 1<<7
};
static const unsigned int SSPM_mask = (SSPM0|SSPM1|SSPM2|SSPM3);
virtual void put(unsigned int);
virtual void put_value(unsigned int);
bool isSSPEnabled() { return (value.get() & SSPEN) == SSPEN; }
bool isI2CActive(unsigned int);
bool isI2CSlave(unsigned int);
bool isI2CMaster(unsigned int);
bool isSPIActive(unsigned int);
bool isSPIMaster() {
return isSSPEnabled() && ((value.get() & SSPM_mask) <= SSPM_SPImasterTMR2);
}
void setWCOL();
void setSSPOV() { put_value(value.get() | SSPOV);}
void setSSPMODULE(SSP_MODULE *);
private:
SSP_MODULE *m_sspmod;
};
class _SSPCON2 : public sfr_register
{
public:
enum {
SEN = 1<<0, // Start or Stretch enable
RSEN = 1<<1, // Repeated Start
PEN = 1<<2, // Stop condition enable
RCEN = 1<<3, // Receive enable bit
ACKEN = 1<<4, // Acknowledge Sequence enable bit
ACKDT = 1<<5, // Acknowledge Data bit
ACKSTAT = 1<<6, // Acknowledge status bit
GCEN = 1<<7 // General call enable
};
void put(unsigned int new_value);
void put_value(unsigned int new_value);
_SSPCON2(Processor *pCpu, SSP_MODULE *);
private:
SSP_MODULE *m_sspmod;
};
class _SSPSTAT : public sfr_register
{
public:
// Register bit definitions
enum {
BF = 1<<0, // Buffer Full
UA = 1<<1, // Update Address
RW = 1<<2, // Read/Write info
S = 1<<3, // Start bit (I2C mode)
P = 1<<4, // Stop bit (I2C mode)
DA = 1<<5, // Data/Address bit (I2C mode)
// below are SSP and MSSP only. This class will force them to
// always be 0 if ssptype == SSP_TYPE_BSSP. This will give the
// corrent behavior.
CKE = 1<<6, // SPI clock edge select
SMP = 1<<7 // SPI data input sample phase
};
_SSPSTAT(Processor *pCpu, SSP_MODULE *);
virtual void put(unsigned int new_value);
virtual void put_value(unsigned int new_value);
private:
SSP_MODULE *m_sspmod;
};
class _SSPBUF : public sfr_register
{
public:
SSP_TYPE ssptype;
_SSPBUF(Processor *pCpu, SSP_MODULE *);
virtual void put(unsigned int new_value);
virtual void put_value(unsigned int new_value);
virtual unsigned int get();
virtual unsigned int get_value();
bool isFull() { return m_bIsFull; }
void setFullFlag(bool bNewFull) { m_bIsFull = bNewFull; }
private:
SSP_MODULE *m_sspmod;
bool m_bIsFull;
};
class _SSPADD : public sfr_register
{
public:
_SSPADD(Processor *pCpu, SSP_MODULE *);
virtual void put(unsigned int new_value);
virtual void put_value(unsigned int new_value);
private:
SSP_MODULE *m_sspmod;
};
class SPI: public TriggerObject
{
public:
SSP_MODULE *m_sspmod;
_SSPBUF *m_sspbuf;
_SSPCON *m_sspcon;
_SSPSTAT *m_sspstat;
SPI(SSP_MODULE *, _SSPCON *, _SSPSTAT *, _SSPBUF *);
bool isIdle() { return m_state==eIDLE;}
virtual void clock(bool);
virtual void start_transfer();
virtual void stop_transfer();
void set_halfclock_break();
virtual void callback();
void newSSPBUF(unsigned int);
virtual void startSPI();
private:
unsigned int m_SSPsr; // internal Shift Register
enum SSPStateMachine {
eIDLE,
eACTIVE,
eWAITING_FOR_LAST_SMP
} m_state;
int bits_transfered;
};
class I2C: public TriggerObject
{
public:
SSP_MODULE *m_sspmod;
_SSPBUF *m_sspbuf;
_SSPCON *m_sspcon;
_SSPSTAT *m_sspstat;
_SSPCON2 *m_sspcon2;
_SSPADD *m_sspadd;
I2C(SSP_MODULE *, _SSPCON *, _SSPSTAT *, _SSPBUF *, _SSPCON2 *, _SSPADD *);
virtual void clock(bool);
virtual void sda(bool);
virtual void callback();
virtual void set_idle();
virtual void newSSPBUF(unsigned int value);
virtual void newSSPADD(unsigned int value);
virtual void start_bit();
virtual void rstart_bit();
virtual void stop_bit();
virtual void master_rx();
virtual void ack_bit();
virtual bool isIdle();
virtual void setBRG();
virtual void clrBRG();
virtual bool rx_byte();
virtual void bus_collide();
virtual void slave_command();
virtual bool end_ack();
private:
unsigned int m_SSPsr; // internal Shift Register
enum I2CStateMachine {
eIDLE,
RX_CMD,
RX_CMD2,
RX_DATA,
TX_DATA,
CLK_TX_BYTE,
CLK_RX_BYTE,
CLK_ACKEN,
CLK_RSTART,
CLK_STOP,
CLK_START
} i2c_state;
int bits_transfered;
int phase;
guint64 future_cycle;
};
class SSP_MODULE
{
public:
_SSPBUF sspbuf;
_SSPCON sspcon;
_SSPSTAT sspstat;
_SSPCON2 sspcon2; // MSSP
// set to NULL for BSSP (It doesn't have this register)
_SSPADD sspadd;
SSP_MODULE(Processor *);
virtual ~SSP_MODULE();
void initialize(PIR_SET *ps,
PinModule *_SckPin,
PinModule *_SdiPin,
PinModule *_SdoPin,
PinModule *_SsPin,
PicTrisRegister *_i2ctris,
SSP_TYPE ssptype = SSP_TYPE_BSSP);
virtual void SDI_SinkState(char);
virtual void SS_SinkState(char);
virtual void SCL_SinkState(char);
virtual bool get_SDI_State() { return m_SDI_State;}
virtual bool get_SCL_State() { return m_SCL_State;}
virtual bool get_SS_State() { return m_SS_State;}
virtual void Sck_toggle() { m_SckSource->toggle();}
virtual void putStateSDO(char _state) {m_SdoSource->putState(_state);}
virtual void putStateSCK(char _state) {m_SckSource->putState(_state);}
virtual void set_sspif() { m_pirset->set_sspif();}
virtual void set_bclif() { m_pirset->set_bclif();}
virtual void startSSP(unsigned int value);
virtual void stopSSP(unsigned int value);
virtual void changeSSP(unsigned int new_value, unsigned int old_value);
virtual void ckpSPI(unsigned int value);
virtual void newSSPBUF(unsigned int value);
virtual void newSSPADD(unsigned int value);
virtual void newSSPCON2(unsigned int value);
virtual void rdSSPBUF();
virtual void tmr2_clock();
virtual SSP_TYPE ssp_type() { return m_ssptype; }
virtual void setSCL(bool);
virtual void setSDA(bool);
virtual bool SaveSSPsr(unsigned int value);
private:
PIR_SET *m_pirset;
SPI *m_spi;
I2C *m_i2c;
PinModule *m_sck;
PinModule *m_ss;
PinModule *m_sdo;
PinModule *m_sdi;
PicTrisRegister *m_i2c_tris;
SSP_TYPE m_ssptype;
bool m_SDI_State;
bool m_SCL_State;
bool m_SS_State;
PeripheralSignalSource *m_SckSource;
PeripheralSignalSource *m_SdoSource;
PeripheralSignalSource *m_SdiSource;
SDI_SignalSink *m_SDI_Sink;
SCL_SignalSink *m_SCL_Sink;
SS_SignalSink *m_SS_Sink;
bool m_sink_set;
};
#endif // __SSP_H__
|