/usr/include/mpich2/primitives/opa_gcc_intel_32_64_p3barrier.h is in libmpich2-dev 1.4.1-1ubuntu1.
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 | /* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil ; -*- */
/*
* (C) 2008 by Argonne National Laboratory.
* See COPYRIGHT in top-level directory.
*/
#ifndef OPA_GCC_INTEL_32_64_P3BARRIER_H_INCLUDED
#define OPA_GCC_INTEL_32_64_P3BARRIER_H_INCLUDED
/* Pentium III and earlier processors have store barriers (sfence),
but no full barrier or load barriers. However, the lock prefix
orders loads and stores (essentially doing a full barrier). */
#define OPA_write_barrier() __asm__ __volatile__ ( "sfence" ::: "memory" )
static inline void OPA_read_barrier(void) {
int a = 0;
__asm__ __volatile__ ("lock orl $0, %0" : "+m" (a));
}
static inline void OPA_read_write_barrier(void) {
int a = 0;
__asm__ __volatile__ ("lock orl $0, %0" : "+m" (a));
}
#endif /* OPA_GCC_INTEL_32_64_P3BARRIER_H_INCLUDED */
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