/usr/arm-linux-gnueabihf/include/linux/fmd/ioctls.h is in linux-libc-dev-armhf-cross 3.13.0-12.32cross1.104.
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 | /* Copyright (c) 2008-2011 Freescale Semiconductor, Inc.
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* derived from this software without specific prior written permission.
*
*
* ALTERNATIVELY, this software may be distributed under the terms of the
* GNU General Public License ("GPL") as published by the Free Software
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*
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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/**************************************************************************//**
@File ioctls.h
@Description Structures and definitions for Command Relay Ioctls
*//***************************************************************************/
#ifndef __IOCTLS_H__
#define __IOCTLS_H__
#include <asm/ioctl.h>
#include "integration_ioctls.h"
/**************************************************************************//**
@Group lnx_ioctl_ncsw_grp NetCommSw Linux User-Space (IOCTL) API
@{
*//***************************************************************************/
#define NCSW_IOC_TYPE_BASE 0xe0 /**< defines the IOCTL type for all
the NCSW Linux module commands */
/**************************************************************************//**
@Description IOCTL Memory allocation types.
*//***************************************************************************/
typedef enum ioc_mem_type {
e_IOC_MEM_INVALID = 0x00000000, /**< Invalid memory type (error) */
e_IOC_MEM_CACHABLE_SYS = 0x00000001, /**< Primary DDR, cacheable segment */
e_IOC_MEM_NOCACHE_SYS = 0x00000004, /**< Primary DDR, non-cacheable segment */
e_IOC_MEM_SECONDARY = 0x00000002, /**< Either secondary DDR or SDRAM */
e_IOC_MEM_PRAM = 0x00000008 /**< Multi-user RAM identifier */
} ioc_mem_type;
/**************************************************************************//**
@Description Enumeration (bit flags) of communication modes (Transmit,
receive or both).
*//***************************************************************************/
typedef enum ioc_comm_mode {
e_IOC_COMM_MODE_NONE = 0 /**< No transmit/receive communication */
, e_IOC_COMM_MODE_RX = 1 /**< Only receive communication */
, e_IOC_COMM_MODE_TX = 2 /**< Only transmit communication */
, e_IOC_COMM_MODE_RX_AND_TX = 3 /**< Both transmit and receive communication */
} ioc_comm_mode;
/**************************************************************************//**
@Description General Diagnostic Mode
*//***************************************************************************/
typedef enum ioc_diag_mode
{
e_IOC_DIAG_MODE_NONE = 0,
e_IOC_DIAG_MODE_CTRL_LOOPBACK, /**< loopback in the controller; E.g. MAC, TDM, etc. */
e_IOC_DIAG_MODE_CHIP_LOOPBACK, /**< loopback in the chip but not in controller;
E.g. IO-pins, SerDes, etc. */
e_IOC_DIAG_MODE_PHY_LOOPBACK, /**< loopback in the external PHY */
e_IOC_DIAG_MODE_LINE_LOOPBACK, /**< loopback in the external line */
e_IOC_DIAG_MODE_CTRL_ECHO, /**< */
e_IOC_DIAG_MODE_PHY_ECHO /**< */
} ioc_diag_mode;
/** @} */ /* end of lnx_ioctl_ncsw_grp */
#endif /* __IOCTLS_H__ */
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