geda-symbols 1:1.8.2-4 / usr / share / gEDA / sym / 4000 / 4021-3.sym

This file is indexed.

/usr/share/gEDA/sym/4000/4021-3.sym is in geda-symbols 1:1.8.2-4.

This file is owned by root:root, with mode 0o644.

The actual contents of the file can be viewed below. 

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v 20070626 1
T 1700 4700 8 10 1 1 0 6 1
refdes=U?
T 300 4850 5 10 0 0 0 0 1
device=4021
T 300 5050 5 10 0 0 0 0 1
footprint=DIP16
T 300 5250 5 10 0 0 0 0 1
net=VSS:8
T 300 5450 5 10 0 0 0 0 1
net=VDD:16
P 0 300 300 300 1 0 0
{
T 200 350 5 8 1 1 0 6 1
pinnumber=9
T 200 250 5 8 0 1 0 8 1
pinseq=1
T 350 300 9 8 1 1 0 0 1
pinlabel=Parallel/\_Serial\_
T 350 300 5 8 0 1 0 2 1
pintype=in
}
P 0 1100 300 1100 1 0 0
{
T 200 1150 5 8 1 1 0 6 1
pinnumber=11
T 200 1050 5 8 0 1 0 8 1
pinseq=2
T 350 1100 9 8 1 1 0 0 1
pinlabel=Serial In
T 350 1100 5 8 0 1 0 2 1
pintype=in
}
P 0 1500 300 1500 1 0 0
{
T 200 1550 5 8 1 1 0 6 1
pinnumber=1
T 200 1450 5 8 0 1 0 8 1
pinseq=3
T 350 1500 9 8 1 1 0 0 1
pinlabel=I8
T 350 1500 5 8 0 1 0 2 1
pintype=in
}
P 0 1900 300 1900 1 0 0
{
T 200 1950 5 8 1 1 0 6 1
pinnumber=15
T 200 1850 5 8 0 1 0 8 1
pinseq=4
T 350 1900 9 8 1 1 0 0 1
pinlabel=I7
T 350 1900 5 8 0 1 0 2 1
pintype=in
}
P 0 2300 300 2300 1 0 0
{
T 200 2350 5 8 1 1 0 6 1
pinnumber=14
T 200 2250 5 8 0 1 0 8 1
pinseq=5
T 350 2300 9 8 1 1 0 0 1
pinlabel=I6
T 350 2300 5 8 0 1 0 2 1
pintype=in
}
P 0 2700 300 2700 1 0 0
{
T 200 2750 5 8 1 1 0 6 1
pinnumber=13
T 200 2650 5 8 0 1 0 8 1
pinseq=6
T 350 2700 9 8 1 1 0 0 1
pinlabel=I5
T 350 2700 5 8 0 1 0 2 1
pintype=in
}
P 0 3100 300 3100 1 0 0
{
T 200 3150 5 8 1 1 0 6 1
pinnumber=4
T 200 3050 5 8 0 1 0 8 1
pinseq=7
T 350 3100 9 8 1 1 0 0 1
pinlabel=I4
T 350 3100 5 8 0 1 0 2 1
pintype=in
}
P 0 3500 300 3500 1 0 0
{
T 200 3550 5 8 1 1 0 6 1
pinnumber=5
T 200 3450 5 8 0 1 0 8 1
pinseq=8
T 350 3500 9 8 1 1 0 0 1
pinlabel=I3
T 350 3500 5 8 0 1 0 2 1
pintype=in
}
P 0 3900 300 3900 1 0 0
{
T 200 3950 5 8 1 1 0 6 1
pinnumber=6
T 200 3850 5 8 0 1 0 8 1
pinseq=9
T 350 3900 9 8 1 1 0 0 1
pinlabel=I2
T 350 3900 5 8 0 1 0 2 1
pintype=in
}
P 0 4300 300 4300 1 0 0
{
T 200 4350 5 8 1 1 0 6 1
pinnumber=7
T 200 4250 5 8 0 1 0 8 1
pinseq=10
T 350 4300 9 8 1 1 0 0 1
pinlabel=I1
T 350 4300 5 8 0 1 0 2 1
pintype=in
}
P 0 700 300 700 1 0 0
{
T 200 750 5 8 1 1 0 6 1
pinnumber=10
T 200 650 5 8 0 1 0 8 1
pinseq=11
T 400 700 9 8 1 1 0 0 1
pinlabel=CLK
T 400 700 5 8 0 1 0 2 1
pintype=clk
}
L 400 700 300 775 3 0 0 0 -1 -1
L 400 700 300 625 3 0 0 0 -1 -1
P 2000 1500 1700 1500 1 0 0
{
T 1800 1550 5 8 1 1 0 0 1
pinnumber=3
T 1800 1450 5 8 0 1 0 2 1
pinseq=12
T 1650 1500 9 8 1 1 0 6 1
pinlabel=Q8
T 1650 1500 5 8 0 1 0 8 1
pintype=out
}
P 2000 1900 1700 1900 1 0 0
{
T 1800 1950 5 8 1 1 0 0 1
pinnumber=12
T 1800 1850 5 8 0 1 0 2 1
pinseq=13
T 1650 1900 9 8 1 1 0 6 1
pinlabel=Q7
T 1650 1900 5 8 0 1 0 8 1
pintype=out
}
P 2000 2300 1700 2300 1 0 0
{
T 1800 2350 5 8 1 1 0 0 1
pinnumber=2
T 1800 2250 5 8 0 1 0 2 1
pinseq=14
T 1650 2300 9 8 1 1 0 6 1
pinlabel=Q6
T 1650 2300 5 8 0 1 0 8 1
pintype=out
}
B 300 0 1400 4600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 300 5850 5 10 0 0 0 0 1
description=8-bit shift register with parallel load
T 300 5650 5 10 0 0 0 0 1
numslots=0
T 300 4650 9 10 1 0 0 0 1
4021

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