/usr/share/gEDA/sym/74/7451-1.sym is in geda-symbols 1:1.8.2-4.
This file is owned by root:root, with mode 0o644.
The actual contents of the file can be viewed below.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 | v 20031231 1
P 0 4200 300 4200 1 0 0
{
T 200 4250 5 8 1 1 0 6 1
pinnumber=1
T 200 4150 5 8 0 1 0 8 1
pinseq=1
T 350 4200 9 8 1 1 0 0 1
pinlabel=1A
T 350 4200 5 8 0 1 0 2 1
pintype=in
}
P 2000 4200 1800 4200 1 0 0
{
T 1800 4250 5 8 1 1 0 0 1
pinnumber=8
T 1800 4150 5 8 0 1 0 2 1
pinseq=2
T 1650 4200 9 8 1 1 0 6 1
pinlabel=1Y
T 1650 4200 5 8 0 1 0 8 1
pintype=out
}
V 1750 4200 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 0 3800 300 3800 1 0 0
{
T 200 3850 5 8 1 1 0 6 1
pinnumber=13
T 200 3750 5 8 0 1 0 8 1
pinseq=3
T 350 3800 9 8 1 1 0 0 1
pinlabel=1B
T 350 3800 5 8 0 1 0 2 1
pintype=in
}
P 0 3400 300 3400 1 0 0
{
T 200 3450 5 8 1 1 0 6 1
pinnumber=12
T 200 3350 5 8 0 1 0 8 1
pinseq=4
T 350 3400 9 8 1 1 0 0 1
pinlabel=1C
T 350 3400 5 8 0 1 0 2 1
pintype=in
}
P 0 3000 300 3000 1 0 0
{
T 200 3050 5 8 1 1 0 6 1
pinnumber=11
T 200 2950 5 8 0 1 0 8 1
pinseq=5
T 350 3000 9 8 1 1 0 0 1
pinlabel=1D
T 350 3000 5 8 0 1 0 2 1
pintype=in
}
P 0 2600 300 2600 1 0 0
{
T 200 2650 5 8 1 1 0 6 1
pinnumber=10
T 200 2550 5 8 0 1 0 8 1
pinseq=6
T 350 2600 9 8 1 1 0 0 1
pinlabel=1E
T 350 2600 5 8 0 1 0 2 1
pintype=in
}
P 0 2200 300 2200 1 0 0
{
T 200 2250 5 8 1 1 0 6 1
pinnumber=9
T 200 2150 5 8 0 1 0 8 1
pinseq=7
T 350 2200 9 8 1 1 0 0 1
pinlabel=1F
T 350 2200 5 8 0 1 0 2 1
pintype=in
}
P 0 1400 300 1400 1 0 0
{
T 200 1450 5 8 1 1 0 6 1
pinnumber=2
T 200 1350 5 8 0 1 0 8 1
pinseq=8
T 350 1400 9 8 1 1 0 0 1
pinlabel=2A
T 350 1400 5 8 0 1 0 2 1
pintype=in
}
P 2000 1400 1800 1400 1 0 0
{
T 1800 1450 5 8 1 1 0 0 1
pinnumber=6
T 1800 1350 5 8 0 1 0 2 1
pinseq=9
T 1650 1400 9 8 1 1 0 6 1
pinlabel=2Y
T 1650 1400 5 8 0 1 0 8 1
pintype=out
}
V 1750 1400 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 0 1000 300 1000 1 0 0
{
T 200 1050 5 8 1 1 0 6 1
pinnumber=3
T 200 950 5 8 0 1 0 8 1
pinseq=10
T 350 1000 9 8 1 1 0 0 1
pinlabel=2B
T 350 1000 5 8 0 1 0 2 1
pintype=in
}
P 0 600 300 600 1 0 0
{
T 200 650 5 8 1 1 0 6 1
pinnumber=4
T 200 550 5 8 0 1 0 8 1
pinseq=11
T 350 600 9 8 1 1 0 0 1
pinlabel=2C
T 350 600 5 8 0 1 0 2 1
pintype=in
}
P 0 200 300 200 1 0 0
{
T 200 250 5 8 1 1 0 6 1
pinnumber=5
T 200 150 5 8 0 1 0 8 1
pinseq=12
T 350 200 9 8 1 1 0 0 1
pinlabel=2D
T 350 200 5 8 0 1 0 2 1
pintype=in
}
B 300 0 1400 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 300 4940 5 10 0 0 0 0 1
device=7451
T 300 4740 5 10 0 0 0 0 1
footprint=DIP14
T 1700 4600 8 10 1 1 0 6 1
refdes=U?
T 300 5150 5 10 0 0 0 0 1
description=combined AND/NOR gates
T 300 5350 5 10 0 0 0 0 1
net=Vcc:14
T 300 5550 5 10 0 0 0 0 1
net=GND:7
T 300 4540 9 10 1 0 0 0 1
7451
L 300 1800 1700 1800 3 0 0 0 -1 -1
L 700 4100 700 3500 3 0 0 0 -1 -1
L 600 4000 700 4000 3 0 0 0 -1 -1
L 600 3800 700 3800 3 0 0 0 -1 -1
L 600 3600 700 3600 3 0 0 0 -1 -1
L 700 3900 900 3900 3 0 0 0 -1 -1
L 700 3700 900 3700 3 0 0 0 -1 -1
A 900 3800 101 271 178 3 0 0 0 -1 -1
L 700 2900 700 2300 3 0 0 0 -1 -1
L 600 2800 700 2800 3 0 0 0 -1 -1
L 600 2600 700 2600 3 0 0 0 -1 -1
L 600 2400 700 2400 3 0 0 0 -1 -1
L 700 2700 900 2700 3 0 0 0 -1 -1
L 700 2500 900 2500 3 0 0 0 -1 -1
A 900 2600 101 271 178 3 0 0 0 -1 -1
L 1000 2600 1100 2600 3 0 0 0 -1 -1
L 1100 2600 1100 2900 3 0 0 0 -1 -1
L 1100 2900 900 2900 3 0 0 0 -1 -1
L 900 2900 900 3150 3 0 0 0 -1 -1
L 1000 3800 1100 3800 3 0 0 0 -1 -1
L 1100 3800 1100 3500 3 0 0 0 -1 -1
L 1100 3500 900 3500 3 0 0 0 -1 -1
L 900 3500 900 3250 3 0 0 0 -1 -1
L 900 3250 1040 3250 3 0 0 0 -1 -1
L 900 3150 1040 3150 3 0 0 0 -1 -1
A 900 3200 146 300 120 3 0 0 0 -1 -1
L 970 3330 1100 3330 3 0 0 0 -1 -1
L 970 3070 1100 3070 3 0 0 0 -1 -1
A 1100 3330 260 270 60 3 0 0 0 -1 -1
A 1100 3070 260 30 60 3 0 0 0 -1 -1
V 1350 3200 20 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 1370 3200 1450 3200 3 0 0 0 -1 -1
L 710 1330 710 1130 3 0 0 0 -1 -1
L 610 1300 710 1300 3 0 0 0 -1 -1
L 610 1160 710 1160 3 0 0 0 -1 -1
L 710 1330 910 1330 3 0 0 0 -1 -1
L 710 1130 910 1130 3 0 0 0 -1 -1
A 910 1230 101 271 178 3 0 0 0 -1 -1
L 710 520 710 320 3 0 0 0 -1 -1
L 610 490 710 490 3 0 0 0 -1 -1
L 610 350 710 350 3 0 0 0 -1 -1
L 710 520 910 520 3 0 0 0 -1 -1
L 710 320 910 320 3 0 0 0 -1 -1
A 910 420 101 271 178 3 0 0 0 -1 -1
L 1010 420 1110 420 3 0 0 0 -1 -1
L 1110 420 1110 620 3 0 0 0 -1 -1
L 1110 620 910 620 3 0 0 0 -1 -1
L 910 620 910 800 3 0 0 0 -1 -1
L 1010 1230 1110 1230 3 0 0 0 -1 -1
L 1110 1230 1110 1050 3 0 0 0 -1 -1
L 1110 1050 910 1050 3 0 0 0 -1 -1
L 910 1050 910 900 3 0 0 0 -1 -1
L 910 900 1050 900 3 0 0 0 -1 -1
L 910 800 1050 800 3 0 0 0 -1 -1
A 910 850 146 300 120 3 0 0 0 -1 -1
L 980 980 1110 980 3 0 0 0 -1 -1
L 980 720 1110 720 3 0 0 0 -1 -1
A 1110 980 260 270 60 3 0 0 0 -1 -1
A 1110 720 260 30 60 3 0 0 0 -1 -1
V 1360 850 20 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 1380 850 1460 850 3 0 0 0 -1 -1
T 300 5750 5 10 0 0 0 0 1
comment=Attention: on some devices the pins 12 and 11 are not connected
T 300 5950 5 10 0 0 0 0 1
numslots=0
|