/usr/share/gEDA/sym/micro/ATmega323-1.sym is in geda-symbols 1:1.8.2-4.
This file is owned by root:root, with mode 0o644.
The actual contents of the file can be viewed below.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 | v 20070626 1
B 400 400 3600 9100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 9950 5 10 0 0 0 0 1
device=ATmega323
T 400 10150 5 10 0 0 0 0 1
footprint=DIL 40 600
T 400 9750 5 10 0 0 0 0 1
numslots=0
P 100 8600 400 8600 1 0 0
{
T 450 8600 5 8 0 1 0 2 1
pintype=io
T 300 8650 5 8 1 1 0 6 1
pinnumber=40
T 300 8550 5 8 0 1 0 8 1
pinseq=40
T 450 8600 9 8 1 1 0 0 1
pinlabel=PA0 (ADC0)
}
P 100 8200 400 8200 1 0 0
{
T 450 8200 5 8 0 1 0 2 1
pintype=io
T 300 8250 5 8 1 1 0 6 1
pinnumber=39
T 300 8150 5 8 0 1 0 8 1
pinseq=39
T 450 8200 9 8 1 1 0 0 1
pinlabel=PA1 (ADC1)
}
P 100 7800 400 7800 1 0 0
{
T 450 7800 5 8 0 1 0 2 1
pintype=io
T 300 7850 5 8 1 1 0 6 1
pinnumber=38
T 300 7750 5 8 0 1 0 8 1
pinseq=38
T 450 7800 9 8 1 1 0 0 1
pinlabel=PA2 (ADC2)
}
P 100 7400 400 7400 1 0 0
{
T 450 7400 5 8 0 1 0 2 1
pintype=io
T 300 7450 5 8 1 1 0 6 1
pinnumber=37
T 300 7350 5 8 0 1 0 8 1
pinseq=37
T 450 7400 9 8 1 1 0 0 1
pinlabel=PA3 (ADC3)
}
P 100 7000 400 7000 1 0 0
{
T 450 7000 5 8 0 1 0 2 1
pintype=io
T 300 7050 5 8 1 1 0 6 1
pinnumber=36
T 300 6950 5 8 0 1 0 8 1
pinseq=36
T 450 7000 9 8 1 1 0 0 1
pinlabel=PA4 (ADC4)
}
P 100 6600 400 6600 1 0 0
{
T 450 6600 5 8 0 1 0 2 1
pintype=io
T 300 6650 5 8 1 1 0 6 1
pinnumber=35
T 300 6550 5 8 0 1 0 8 1
pinseq=35
T 450 6600 9 8 1 1 0 0 1
pinlabel=PA5 (ADC5)
}
P 100 6200 400 6200 1 0 0
{
T 450 6200 5 8 0 1 0 2 1
pintype=io
T 300 6250 5 8 1 1 0 6 1
pinnumber=34
T 300 6150 5 8 0 1 0 8 1
pinseq=34
T 450 6200 9 8 1 1 0 0 1
pinlabel=PA6 (ADC6)
}
P 100 5800 400 5800 1 0 0
{
T 450 5800 5 8 0 1 0 2 1
pintype=io
T 300 5850 5 8 1 1 0 6 1
pinnumber=33
T 300 5750 5 8 0 1 0 8 1
pinseq=33
T 450 5800 9 8 1 1 0 0 1
pinlabel=PA7 (ADC7)
}
P 100 5200 400 5200 1 0 0
{
T 450 5200 5 8 0 1 0 2 1
pintype=io
T 300 5250 5 8 1 1 0 6 1
pinnumber=1
T 300 5150 5 8 0 1 0 8 1
pinseq=1
T 450 5200 9 8 1 1 0 0 1
pinlabel=PB0 (XCK/T0)
}
P 100 4800 400 4800 1 0 0
{
T 450 4800 5 8 0 1 0 2 1
pintype=io
T 300 4850 5 8 1 1 0 6 1
pinnumber=2
T 300 4750 5 8 0 1 0 8 1
pinseq=2
T 450 4800 9 8 1 1 0 0 1
pinlabel=PB1 (T1)
}
P 100 4400 400 4400 1 0 0
{
T 450 4400 5 8 0 1 0 2 1
pintype=io
T 300 4450 5 8 1 1 0 6 1
pinnumber=3
T 300 4350 5 8 0 1 0 8 1
pinseq=3
T 450 4400 9 8 1 1 0 0 1
pinlabel=PB2 (INT2/AIN0)
}
P 100 4000 400 4000 1 0 0
{
T 450 4000 5 8 0 1 0 2 1
pintype=io
T 300 4050 5 8 1 1 0 6 1
pinnumber=4
T 300 3950 5 8 0 1 0 8 1
pinseq=4
T 450 4000 9 8 1 1 0 0 1
pinlabel=PB3 (OC0/AIN1)
}
P 100 3600 400 3600 1 0 0
{
T 450 3600 5 8 0 1 0 2 1
pintype=io
T 300 3650 5 8 1 1 0 6 1
pinnumber=5
T 300 3550 5 8 0 1 0 8 1
pinseq=5
T 450 3600 9 8 1 1 0 0 1
pinlabel=PB4 (\_SS\_)
}
P 100 3200 400 3200 1 0 0
{
T 450 3200 5 8 0 1 0 2 1
pintype=io
T 300 3250 5 8 1 1 0 6 1
pinnumber=6
T 300 3150 5 8 0 1 0 8 1
pinseq=6
T 450 3200 9 8 1 1 0 0 1
pinlabel=PB5 (MOSI)
}
P 100 2800 400 2800 1 0 0
{
T 450 2800 5 8 0 1 0 2 1
pintype=io
T 300 2850 5 8 1 1 0 6 1
pinnumber=7
T 300 2750 5 8 0 1 0 8 1
pinseq=7
T 450 2800 9 8 1 1 0 0 1
pinlabel=PB6 (MISO)
}
P 100 2400 400 2400 1 0 0
{
T 450 2400 5 8 0 1 0 2 1
pintype=io
T 300 2450 5 8 1 1 0 6 1
pinnumber=8
T 300 2350 5 8 0 1 0 8 1
pinseq=8
T 450 2400 9 8 1 1 0 0 1
pinlabel=PB7 (SCK)
}
P 4000 8600 4300 8600 1 0 1
{
T 3950 8600 5 8 0 1 0 8 1
pintype=io
T 4100 8650 5 8 1 1 0 0 1
pinnumber=22
T 4100 8550 5 8 0 1 0 2 1
pinseq=22
T 3950 8600 9 8 1 1 0 6 1
pinlabel=(SCL) PC0
}
P 4000 8200 4300 8200 1 0 1
{
T 3950 8200 5 8 0 1 0 8 1
pintype=io
T 4100 8250 5 8 1 1 0 0 1
pinnumber=23
T 4100 8150 5 8 0 1 0 2 1
pinseq=23
T 3950 8200 9 8 1 1 0 6 1
pinlabel=(SDA) PC1
}
P 4000 7800 4300 7800 1 0 1
{
T 3950 7800 5 8 0 1 0 8 1
pintype=io
T 4100 7850 5 8 1 1 0 0 1
pinnumber=24
T 4100 7750 5 8 0 1 0 2 1
pinseq=24
T 3950 7800 9 8 1 1 0 6 1
pinlabel=(TCK) PC2
}
P 4000 7400 4300 7400 1 0 1
{
T 3950 7400 5 8 0 1 0 8 1
pintype=io
T 4100 7450 5 8 1 1 0 0 1
pinnumber=25
T 4100 7350 5 8 0 1 0 2 1
pinseq=25
T 3950 7400 9 8 1 1 0 6 1
pinlabel=(TMS) PC3
}
P 4000 7000 4300 7000 1 0 1
{
T 3950 7000 5 8 0 1 0 8 1
pintype=io
T 4100 7050 5 8 1 1 0 0 1
pinnumber=26
T 4100 6950 5 8 0 1 0 2 1
pinseq=26
T 3950 7000 9 8 1 1 0 6 1
pinlabel=(TDO) PC4
}
P 4000 6600 4300 6600 1 0 1
{
T 3950 6600 5 8 0 1 0 8 1
pintype=io
T 4100 6650 5 8 1 1 0 0 1
pinnumber=27
T 4100 6550 5 8 0 1 0 2 1
pinseq=27
T 3950 6600 9 8 1 1 0 6 1
pinlabel=(TDI) PC5
}
P 4000 6200 4300 6200 1 0 1
{
T 3950 6200 5 8 0 1 0 8 1
pintype=io
T 4100 6250 5 8 1 1 0 0 1
pinnumber=28
T 4100 6150 5 8 0 1 0 2 1
pinseq=28
T 3950 6200 9 8 1 1 0 6 1
pinlabel=(TOSC1) PC6
}
P 4000 5800 4300 5800 1 0 1
{
T 3950 5800 5 8 0 1 0 8 1
pintype=io
T 4100 5850 5 8 1 1 0 0 1
pinnumber=29
T 4100 5750 5 8 0 1 0 2 1
pinseq=29
T 3950 5800 9 8 1 1 0 6 1
pinlabel=(TOSC2) PC7
}
P 4000 5200 4300 5200 1 0 1
{
T 3950 5200 5 8 0 1 0 8 1
pintype=io
T 4100 5250 5 8 1 1 0 0 1
pinnumber=14
T 4100 5150 5 8 0 1 0 2 1
pinseq=14
T 3950 5200 9 8 1 1 0 6 1
pinlabel=(RXD) PD0
}
P 4000 4800 4300 4800 1 0 1
{
T 3950 4800 5 8 0 1 0 8 1
pintype=io
T 4100 4850 5 8 1 1 0 0 1
pinnumber=15
T 4100 4750 5 8 0 1 0 2 1
pinseq=15
T 3950 4800 9 8 1 1 0 6 1
pinlabel=(TXD) PD1
}
P 4000 4400 4300 4400 1 0 1
{
T 3950 4400 5 8 0 1 0 8 1
pintype=io
T 4100 4450 5 8 1 1 0 0 1
pinnumber=16
T 4100 4350 5 8 0 1 0 2 1
pinseq=16
T 3950 4400 9 8 1 1 0 6 1
pinlabel=(INT0) PD2
}
P 4000 4000 4300 4000 1 0 1
{
T 3950 4000 5 8 0 1 0 8 1
pintype=io
T 4100 4050 5 8 1 1 0 0 1
pinnumber=17
T 4100 3950 5 8 0 1 0 2 1
pinseq=17
T 3950 4000 9 8 1 1 0 6 1
pinlabel=(INT1) PD3
}
P 4000 3600 4300 3600 1 0 1
{
T 3950 3600 5 8 0 1 0 8 1
pintype=io
T 4100 3650 5 8 1 1 0 0 1
pinnumber=18
T 4100 3550 5 8 0 1 0 2 1
pinseq=18
T 3950 3600 9 8 1 1 0 6 1
pinlabel=(OC1B) PD4
}
P 4000 3200 4300 3200 1 0 1
{
T 3950 3200 5 8 0 1 0 8 1
pintype=io
T 4100 3250 5 8 1 1 0 0 1
pinnumber=19
T 4100 3150 5 8 0 1 0 2 1
pinseq=19
T 3950 3200 9 8 1 1 0 6 1
pinlabel=(OC1A) PD5
}
P 4000 2800 4300 2800 1 0 1
{
T 3950 2800 5 8 0 1 0 8 1
pintype=io
T 4100 2850 5 8 1 1 0 0 1
pinnumber=20
T 4100 2750 5 8 0 1 0 2 1
pinseq=20
T 3950 2800 9 8 1 1 0 6 1
pinlabel=(ICP) PD6
}
P 4000 2400 4300 2400 1 0 1
{
T 3950 2400 5 8 0 1 0 8 1
pintype=io
T 4100 2450 5 8 1 1 0 0 1
pinnumber=21
T 4100 2350 5 8 0 1 0 2 1
pinseq=21
T 3950 2400 9 8 1 1 0 6 1
pinlabel=(OC2) PD7
}
P 2000 9800 2000 9500 1 0 0
{
T 2000 9450 5 8 0 1 90 8 1
pintype=pwr
T 1950 9600 5 8 1 1 90 0 1
pinnumber=30
T 2050 9600 5 8 0 1 90 2 1
pinseq=30
T 2000 9450 9 8 1 1 90 6 1
pinlabel=AVCC
}
P 2400 100 2400 400 1 0 0
{
T 2400 450 5 8 0 1 90 2 1
pintype=pwr
T 2350 300 5 8 1 1 90 6 1
pinnumber=11
T 2450 300 5 8 0 1 90 8 1
pinseq=11
T 2400 450 9 8 1 1 90 0 1
pinlabel=GND
}
P 100 9100 300 9100 1 0 0
{
T 450 9100 5 8 0 1 0 2 1
pintype=in
T 300 9150 5 8 1 1 0 6 1
pinnumber=9
T 300 9050 5 8 0 1 0 8 1
pinseq=9
T 450 9100 9 8 1 1 0 0 1
pinlabel=\_RESET\_
}
P 2400 9800 2400 9500 1 0 0
{
T 2400 9450 5 8 0 1 90 8 1
pintype=pwr
T 2350 9600 5 8 1 1 90 0 1
pinnumber=10
T 2450 9600 5 8 0 1 90 2 1
pinseq=10
T 2400 9450 9 8 1 1 90 6 1
pinlabel=VCC
}
P 2000 100 2000 400 1 0 0
{
T 2000 450 5 8 0 1 90 2 1
pintype=pwr
T 1950 300 5 8 1 1 90 6 1
pinnumber=31
T 2050 300 5 8 0 1 90 8 1
pinseq=31
T 2000 450 9 8 1 1 90 0 1
pinlabel=AGND
}
P 100 1800 400 1800 1 0 0
{
T 450 1800 5 8 0 1 0 2 1
pintype=in
T 300 1850 5 8 1 1 0 6 1
pinnumber=13
T 300 1750 5 8 0 1 0 8 1
pinseq=13
T 450 1800 9 8 1 1 0 0 1
pinlabel=XTAL1
}
P 100 1400 400 1400 1 0 0
{
T 450 1400 5 8 0 1 0 2 1
pintype=out
T 300 1450 5 8 1 1 0 6 1
pinnumber=12
T 300 1350 5 8 0 1 0 8 1
pinseq=12
T 450 1400 9 8 1 1 0 0 1
pinlabel=XTAL2
}
P 100 800 400 800 1 0 0
{
T 450 800 5 8 0 1 0 2 1
pintype=in
T 300 850 5 8 1 1 0 6 1
pinnumber=32
T 300 750 5 8 0 1 0 8 1
pinseq=32
T 450 800 9 8 1 1 0 0 1
pinlabel=AREF
}
T 4000 9600 8 10 1 1 0 6 1
refdes=U?
T 400 10350 5 10 0 0 0 0 1
description=8-bit RISC micro controller (Atmel)
T 400 9550 9 10 1 0 0 0 1
ATmega323
V 350 9100 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
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