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<title> MLRisc Generation </title>
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MLRISC
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<a href="INTRO.html"><font size="-1">MLRISC</font></a><br>
<a href="contributors.html"><font size="-1">Contributors</font></a><br>
<a href="requirements.html"><font size="-1">Requirements</font></a><br>
<a href="availability.html"><font size="-1">How to Obtain MLRISC</font></a><br>
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Overview
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<a href="problem.html"><font size="-1">Problem Statement</font></a><br>
<a href="contributions.html"><font size="-1">Contributions</font></a><br>
<a href="mlrisc-compiler.html"><font size="-1">MLRISC Based Compiler</font></a><br>
<a href="mlrisc-ir-rep.html"><font size="-1">MLRISC Intermediate Representation</font></a><br>
<a href="mlrisc-gen.html"><font size="-1"><font color="#486591"><b>MLRisc Generation</b></font></font></a><br>
<a href="backend-opt.html"><font size="-1">Back End Optimizations</font></a><br>
<a href="mlrisc-ra.html"><font size="-1">Register Allocation</font></a><br>
<a href="mlrisc-md.html"><font size="-1">Machine Description</font></a><br>
<a href="gc.html"><font size="-1">Garbage Collection Safety</font></a><br>
<a href="sys-integration.html"><font size="-1">System Integration</font></a><br>
<a href="optimizations.html"><font size="-1">Optimizations</font></a><br>
<a href="mlrisc-graphics.html"><font size="-1">Graphical Interface</font></a><br>
<a href="line-counts.html"><font size="-1">Line Counts</font></a><br>
<a href="systems.html"><font size="-1">Systems Using MLRISC</font></a><br>
<a href="future-work.html"><font size="-1">Future Work</font></a><br>
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System
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<a href="mlrisc-arch.html"><font size="-1">Architecture of MLRISC</font></a><br>
<a href="mltree.html"><font size="-1">The MLTREE Language</font></a><br>
<a href="mltree-ext.html"><font size="-1">MLTree Extensions</font></a><br>
<a href="mltree-util.html"><font size="-1">MLTree Utilities</font></a><br>
<a href="instrsel.html"><font size="-1">Instruction Selection</font></a><br>
<a href="asm.html"><font size="-1">Assemblers</font></a><br>
<a href="mc.html"><font size="-1">Machine Code Emitters</font></a><br>
<a href="delayslots.html"><font size="-1">Delay Slot Filling</font></a><br>
<a href="span-dep.html"><font size="-1">Span Dependency Resolution</font></a><br>
<a href="graphs.html"><font size="-1">The Graph Library</font></a><br>
<a href="graphics.html"><font size="-1">The Graph Visualization Library</font></a><br>
<a href="compiler-graphs.html"><font size="-1">Basic Compiler Graphs</font></a><br>
<a href="mlrisc-ir.html"><font size="-1">The MLRISC IR</font></a><br>
<a href="SSA.html"><font size="-1">SSA Optimizations</font></a><br>
<a href="ILP.html"><font size="-1">ILP Optimizations</font></a><br>
<a href="VLIW.html"><font size="-1">Optimizations for VLIW/EPIC Architectur...</font></a><br>
<a href="ra.html"><font size="-1">Register Allocator</font></a><br>
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Back Ends
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<a href="alpha.html"><font size="-1">The Alpha Back End</font></a><br>
<a href="hppa.html"><font size="-1">The PA RISC Back End</font></a><br>
<a href="sparc.html"><font size="-1">The Sparc Back End</font></a><br>
<a href="x86.html"><font size="-1">The Intel x86 Back End</font></a><br>
<a href="ppc.html"><font size="-1">The PowerPC Back End</font></a><br>
<a href="mips.html"><font size="-1">The MIPS Back End</font></a><br>
<a href="C6.html"><font size="-1">The TI C6x Back End</font></a><br>
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Basic Types
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<a href="cells.html"><font size="-1">Cells</font></a><br>
<a href="cluster.html"><font size="-1">Cluster</font></a><br>
<a href="constants.html"><font size="-1">Client Defined Constants</font></a><br>
<a href="pseudo-ops.html"><font size="-1">Client Defined Pseudo Ops</font></a><br>
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<a href="streams.html"><font size="-1">Instruction Streams</font></a><br>
<a href="labelexp.html"><font size="-1">Label Expressions</font></a><br>
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<a href="regmap.html"><font size="-1">Regmap</font></a><br>
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<center><h1><font color="#486591"><b>MLRisc Generation</b></font></h1></center>
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Every compiler will eventually compile down to an abstract machine
that it believes will execute source programs efficiently. The
abstract machine will typically consists of abstract machine
registers and instructions, one or more stacks, and parameter
passing conventions. The hope is that all this will map down
efficiently onto the target machine. Indeed, the abstract machine
should be reasonably close to architectures that are envisioned as
possible targets. Several step need to be followed in the generation
of MLRisc.
<p>
<ol>
<li> The first step in generating target machine code is to define
the MLRisc intermediate representation after it has been
appropriately specialized. The interfaces that describe the
dimensions of specialization are quite simple. Depending on the
compiler, these may be target dependent; for example, in the SML/NJ
compiler, the encoding of registers used to indicate the roots of
garbage collection depend on how the runtime system decodes the
information.
<p>
<li> The only real connection between the MLRisc intermediate
representation and the target machine is that the first
<math class="inline"><i>0..K-1</i></math> MLRisc registers map onto the first <math class="inline"><i>K</i></math>
physical registers on the target machine. Thus some mapping of
dedicated abstract machine registers to physical target registers is
required. It is not always necessary to map abstract machine
registers to physical machine registers. For example, on
architectures like the x86 with few registers, some abstract machine
registers may be mapped to fixed memory locations. Thus an abstract
machine register like the <tt>maskReg</tt> may have something like:
<font color="#000000"><small><pre>
LOAD(32, LABEL maskRegLab)
</pre></small></font>
spliced instead.
<p>
<li> The unit of compilation is called a
<a href="cluster.html">cluster</a> which
is the smallest unit for inter-procedural optimizations. A cluster
will typically consist of several entry points that may call each
other, as well as call local functions in the module. For maximum
flexibility, the parameter passing convention for local functions
should be specialized by the <a href="mlrisc-ra.html">register allocator</a>.
<p>
Once the MLRisc trees for a cluster have been built, they must
be converted into target assembly or machine code. This is done by
building up a function (<font color="#ff0000">codegen</font>) that
glues together optimizations modules that have been specialized. For
example, the target instruction set must be specialized to hold the
MLRisc constants; the flowgraph must be specialized to carry these
instructions as well as the MLRisc pseudo-ops; the optimization
modules must know about several front end constraints such as how to
spill registers.
</ol>
<p>
If the module that translates the abstract machine instructions
into MLRisc instructions has been appropriately parameterized, then
it can be reused for multiple target architectures. For high level
languages it is better to generate MLRisc instructions from the high
level intermediate form used by the front end of the compiler.
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<a href="mailto:george@research.bell-labs.com">Lal George</a>
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<a href="mailto:leunga@cs.nyu.edu">Allen Leung</a>
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