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     <title> Register Allocation </title>
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  <tr><td>
    </td></tr><tr><td>
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    MLRISC
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    Overview
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    Basic Types
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    <center><h1><font color="#486591"><b>Register Allocation</b></font></h1></center>
    <hr> 
    
     
   All the optimization modules are written in a generic fashion but
   parameterized over architecture and client information. The Standard
   ML module system is a central mechanism to the design and
   organization of MLRISC. Parameterized modules in Standard ML are
 provided by <font color="#ff0000">functors</font>, that takes the
 specification of input modules and produces a module that matches some
 output specification. In particular, SML/NJ modules are 
 <em>higher order</em>, which means that a functor can yield functors as a
 result. I will use register allocation as an example.
 <p>
 <img alt="Back end optimizations" src=pictures/png/hof-1.png align=left>
 <p>
   The register allocator is written has a higher order functor which
   when applied to suitable arguments produces an integer or floating
   point register allocator. The figure is simplifed because the output
   functor is not restricted to integer and floating point allocators
   but could also be other types of allocators, for example, condition
   code.  The integer and floating point register allocators are
   functors that only take <em>client specific</em> parameters as
   input, whereas the higher-order takes architectural parameters as
   input. The client specific parameters include:
 <font color="#000000"><small><pre>
   nFreeRegs : int
   dedicated : int list
   spill : ..
   reload : ..
 </pre></small></font>
 
 where:
  <dl> 
     <dt><font color="#000070"><tt>nFreeRegs</tt></font><dd> is the number of free registers or
     essentially the number of colors available for coloring the
     interference graph.
 <p>
     <dt><font color="#000070"><tt>dedicated</tt></font><dd> is the list of dedicated registers. It
     is useful to exclude these from the graph-color process to reduce
     the size of the data structures created.
 <p>
     <dt><font color="#000070"><tt>spill/reload</tt></font><dd> are functions that describe how to
     spill and reload registers that need to be spilled or reloaded in
     an instruction. These two functions are perhaps the most
     complicated pieces of information that need to be supplied by a
     client of MLRISC.
 </dl> 
 <p>
   The architecture specific parameters supplied to the higher-order
   functor include:
 <font color="#000000"><small><pre>
   firstPseudoReg : int
   maxPseudoR : unit -&gt; int
   defUse : instruction -&gt; (int list * int list)
 </pre></small></font>
 
   where: 
 <dl>  
     <dt><font color="#000070"><tt>firstPseudoR</tt></font><dd> is an integer representing the first
     pseudo register. Any register below this value is a physical
     register.
 <p>
     <dt><font color="#000070"><tt>maxPseudoR</tt></font><dd> is a function that returns an
     integer indicating the number of the highest pseudo-register that
     has been used in the program. This number is useful in estimating
     the intial size of various tables.
 <p>
     <dt><font color="#000070"><tt>defUse</tt></font><dd> is a function that returns the
     registers defined and used by an instruction.
 </dl>
 <p>
   These parameters are largely self explanatory, however, there are
   addition architectural parameters that relate to the internal
   representation of instructions that would be ugly to explain. For
   example there is the need for a module that does liveness analysis
   over the register class that is being allocated. This type of
   complexity can be shielded from a user.  For the DEC Alpha the
   situation is as shown in the figure:
 <p>
   <img alt="Back end optimizations" src=pictures/png/hof-2.png align=center>
 <p>
   The client only sees the functors on the right, to which only client
   specific information need be provided. There is the illusion of a
   dedicated DEC Alpha integer and floating point register
   allocator. There are several advantages to this:
   <ul>
     <li> The architectural parameters that are implementation specific
 do not need to be explained to a user, and are supplied by someone
 that intimately understands the port to the target architecture. 
 <p>
      <li> The number of parameters that a client supplies is
 reduced.
 <p>
      <li> The parameters that the client supplies is restricted to
 things that concern the front end. 
   </ul>

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<tr><td><font size="-1">
<a href="mailto:george@research.bell-labs.com">Lal George</a>
</font></td></tr>
<tr><td><font size="-1">
<a href="mailto:leunga@cs.nyu.edu">Allen Leung</a>
</font></td></tr>
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